Block Name
IrDA
Base Address
0x0080
(TXFL FIFO)
Offset
0000h
000ꢀh
000ꢁh
000ꢂh
0004h
0005h
0006h
0007h
0008h
0009h
0000h
000ꢀh
000ꢁh
000ꢂh
0004h
0005h
0006h
0007h
0008h
0000h
0000h
000ꢀh
000ꢁh
000ꢂh
0004h
0005h
0006h
0007h
0000h
0000h
000ꢀh
000ꢁh
000ꢂh
0004h
0005h
0006h
0000h
000ꢀh
000ꢁh
000ꢂh
0004h
0005h
0006h
0000h
000ꢀh
000ꢁh
000ꢂh
0004h
0005h
0006h
0000h
000ꢀh
000ꢁh
000ꢂh
0004h
0005h
0006h
Register Name
TXFL0R(TX Frame Length0 REG.)
TXFLꢀR(TX Frame Lengthꢀ REG.)
Unused
TXSR(TX Status REG.)
TXFA0R(TX Frame Address0 REG.)
TXFAꢀR(TX Frame Addressꢀ REG.)
TXFAꢁR(TX Frame Addressꢁ REG.)
TXFAꢂR(TX Frame Addressꢂ REG.)
TXSIR(TX Status IncrementREG.)
TXFCR(TX Frame Count REG)
RXFL0R(RX Frame Length0 REG.)
RXFLꢀR(RX Frame Lengthꢀ REG.)
Unused
IrDA
0x0090
(RXFL FIFO)
RXSR(RX Status REG.)
RXFA0R(RX Frame Address0 REG.)
RXFAꢀR(RX Frame Addressꢀ REG.)
RXFAꢁR(RX Frame Addressꢁ REG.)
RXFAꢂR(RX Frame Addressꢂ REG.)
RXSIR(RX Status IncrementREG.)
MTDR (Memory Transmit Data REG) Write Only
MRDR(Memory Receive Data REG) Read Only
MCR(Memory Control REG.)
Global Control
0x00A0
GISR(Global Interrupt Status REG.)
IRSR (IR Select REG.)
IOR(Ir Output REG)
IIR(Ir Input REG)
ISIER(Ir Sir Interupt Enable REG)
ISISR(Ir Sir Interupt Status REG)
DMACR(DMA Control REG)
DMA Control
Remote Control
0x00B0
0x00C0
RCCCLR(Remote Control Carrier Count Low REG)
RCCCHR(Remote Control Carrier Count High REG)
RCLLR(Remote Control Length Low REG.)
RCLHR(Remote Control Length High REG.)
RCCR(Remote Control Control REG)
RCCRCLR(Remote Control Carrier RX Count Low REG)
RCCRCHR (Remote Control Carrier RX Count High REG)
TSSR0(Timer Source Setting REG.0)
TIER0(Timer Interrupt Enable REG.0)
TCSR0(Timer Contorol Status REG.0)
TCMLR0(Timer Compare Mach Low REG.0)
TCMHR0(Timer Compare Mach High REG.0)
TCLR0(Timer Count Low REG.0)
TCHR0(Timer Count High REG.0)
TSSRꢀ(Timer Source Setting REG.ꢀ)
TIERꢀ(Timer Interrupt Enable REG.ꢀ)
TCSRꢀ(Timer Contorol Status REG.ꢀ)
TCMLRꢀ(Timer Compare Mach Low REG.ꢀ)
TCMHRꢀ(Timer Compare Mach High REG.ꢀ)
TCLRꢀ(Timer Count Low REG.ꢀ)
TCHRꢀ(Timer Count High REG.ꢀ)
TSSRꢁ(Timer Source Setting REG.ꢁ)
TIERꢁ(Timer Interrupt Enable REG.ꢁ)
TCSRꢁ(Timer Contorol Status REG.ꢁ)
TCMLRꢁ(Timer Compare Mach Low REG.ꢁ)
TCMHRꢁ(Timer Compare Mach High REG.ꢁ)
TCLRꢁ(Timer Count Low REG.ꢁ)
TCHRꢁ(Timer Count High REG.ꢁ)
Timer Control
0x00D0
0x00E0
0x00F0
7