LTC2487
applicaTions inForMaTion
CONVERTER OPERATION
POWER-ON RESET
DEFAULT CONFIGURATION:
+
–
IN = CH0, IN = CH1
50Hz/60Hz REJECTION
1X OUTPUT, GAIN = 1
Converter Operation Cycle
The LTC2487 is a multichannel, low power, delta-sigma,
2
analog-to-digital converter with a 2-wire, I C interface.
CONVERSION
SLEEP
Its operation is made up of four states (see Figure 1).
The converter operating cycle begins with the conver-
sion, followed by the sleep state, and ends with the data
input/output cycle.
Initially, atpower-up, theLTC2487performsaconversion.
Once the conversion is complete, the device enters the
sleepstate. Whileinthesleepstate, powerconsumptionis
reduced by two orders of magnitude. The part remains in
the sleep state as long it is not addressed for a read/write
operation. The conversion result is held indefinitely in a
static shift register while the part is in the sleep state.
NO
ACKNOWLEDGE
YES
DATA OUTPUT/INPUT
The device will not acknowledge an external request dur-
ing the conversion state. After a conversion is finished,
the device is ready to accept a read/write request. Once
the LTC2487 is addressed for a read operation, the device
begins outputting the conversion result under the control
of the serial clock (SCL). There is no latency in the conver-
sion result. The data output is 24 bits long and contains a
16-bit plus sign conversion result. Data is updated on the
fallingedgesofSCLallowingtheuserto reliablylatchdata
on the rising edge of SCL. A new conversion is initiated
by a stop condition following a valid write operation or an
incomplete read operation. The conversion automatically
begins at the conclusion of a complete read cycle (all 24
bits read out of the device).
STOP
NO
OR READ
24 BITS
YES
2487 F01
Figure 1. State Transition Table
The LTC2487 automatically performs offset and full-scale
calibrationeveryconversioncycleindependentoftheinput
channelselected.Thiscalibrationistransparenttotheuser
and has no effect on the operation cycle described above.
Theadvantageofcontinuouscalibrationisextremestability
ofoffsetandfull-scalereadingswithrespecttotime,supply
voltage variation, input channel, and temperature drift.
Ease of Use
Easy Drive Input Current Cancellation
The LTC2487 data output has no latency, filter settling
delay, or redundant data associated with the conversion
cycle. There is a one-to-one correspondence between the
conversion and the output data. Therefore, multiplexing
multiple analog inputs is straightforward. Each conver-
sion, immediately following a newly selected input or
mode, is valid and accurate to the full specifications of
the device.
The LTC2487 combines a high precision, delta-sigma ADC
with an automatic, differential, input current cancellation
frontend.Aproprietaryfrontendpassivesamplingnetwork
transparently removes the differential input current. This
enables external RC networks and high impedance sen-
sors to directly interface to the LTC2487 without external
2487fa
ꢀꢁ
Linear [ Linear ]
