LTC1154
U
U
U
PI FU CTIO S
Drain Sense Pin
sense pin to ensure that the drain sense circuitry does not
false-triggerduringstart-up. Thistimeconstantcanbeset
fromafewmicrosecondstomanyseconds.However,very
longdelaysmayputtheMOSFETinriskofbeingdestroyed
byashort-circuitcondition. (seeApplicationsInformation
Section).
The drain sense pin is compared against the supply pin
voltage.Ifthevoltageatthispinismorethan100mVbelow
thesupplypin,theinputlatchwillberesetandtheMOSFET
gatewillbequicklydischarged.Cycletheinput,orENABLE
input, to reset the short-circuit latch and turn the MOSFET
back on.
Status Pin
This pin is also a high impedance CMOS gate with ESD
protection and therefore should not be forced beyond the
power supply rails. To defeat the over current protection,
short the drain sense to supply.
The status pin is an open-drain output which is driven low
whenever a fault condition is detected. A 51k pull-up
resistor should be connected between this output and a
logic supply. The status pins of multiple LTC1154s can be
OR’d together if independent fault sensing is not required.
No connection is required to this pin when not in use.
Some loads, such as large supply capacitors, lamps, or
motors require high in-rush currents. An RC time delay
can be added between the sense resistor and the drain
W
BLOCK DIAGRA
DRAIN
SENSE
ANALOG SECTION
V
S
SHUTDOWN
TTL-TO-CMOS
CONVERTER
10µs
DELAY
COMP
SHUTDOWN
GATE
LOW STANDBY
CURRENT
REGULATOR
100mV
REFERENCE
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
ANALOG DIGITAL
R
INPUT
LATCH
TTL-TO-CMOS
CONVERTER
VOLTAGE
REGULATORS
INPUT
OSCILLATOR
AND CHARGE
PUMP
FAST/SLOW
GATE CHARGE
LOGIC
ONE
SHOT
S
ENABLE
GND
FAULT DETECTION
AND STATUS
OUTPUT DRIVER
STATUS
LTC1154 • BD01
6
Linear [ Linear ]
