LT3580
APPLICATIONS INFORMATION
Setting Output Voltage
The output voltage is set by connecting a resistor (R
FB
)
from V
OUT
to the FB pin. R
FB
is determined from the
following equation:
|V
V |
R
FB
=
OUT FB
83.3μA
where V
FB
is 1.215V (typical) for non-inverting topologies
(i.e., boost and SEPIC regulators) and 5mV (typical) for
inverting topologies (see the Electrical Characteristics).
Power Switch Duty Cycle
In order to maintain loop stability and deliver adequate
current to the load, the power NPN (Q1 in the Block Dia-
gram) cannot remain “on” for 100% of each clock cycle.
The maximum allowable duty cycle is given by:
DC
MAX
=
(T
P
Min Off Time)
• 100%
T
P
Inductor Selection
General Guidelines:
The high frequency operation of the
LT3580 allows for the use of small surface mount inductors.
For high efficiency, choose inductors with high frequency
core material, such as ferrite, to reduce core losses. To
improve efficiency, choose inductors with more volume
for a given inductance. The inductor should have low DCR
(copper wire resistance) to reduce I
2
R losses, and must be
able to handle the peak inductor current without saturat-
ing. Note that in some applications, the current handling
requirements of the inductor can be lower, such as in the
SEPIC topology, where each inductor only carries a frac-
tion of the total switch current. Molded chokes or chip
inductors usually do not have enough core area to sup-
port peak inductor currents in the 2A to 3A range. To
minimize radiated noise, use a toroidal or shielded induc-
tor. Note that the inductance of shielded types will drop
more as current increases, and will saturate more easily.
See Table 1 for a list of inductor manufacturers.
Table 1.Inductor Manufacturers
Coilcraft
DO3316P, MSS7341 and LPS4018
Series
LQH55D and LQH66S Series
www.coilcraft.com
www.coiltronics.com
www.murata.com
where T
P
is the clock period and Min Off Time (found in
the Electrical Characteristics) is typically 60ns.
The application should be designed so that the operating
duty cycle does not exceed DC
MAX
.
Duty cycle equations for several common topologies are
given below, where V
D
is the diode forward voltage drop
and V
CESAT
is typically 300mV at 1.5A.
For the boost topology:
V
OUT
V
IN
+
V
D
DC
V
OUT
+
V
D
V
CESAT
For the SEPIC or dual inductor inverting topology (see
Figures 1 and 2):
V
D
+|
V
OUT
|
DC
V
IN
+
| V
OUT
|
+
V
D
V
CESAT
The LT3580 can be used in configurations where the duty
cycle is higher than DC
MAX
, but it must be operated in
the discontinuous conduction mode so that the effective
duty cycle is reduced.
Coiltronics DR, LD and CD Series
Murata
Sumida
CDRH5D18B/HP, CDR6D23MN,
www.sumida.com
CDRH6D26/HP, CDRH6D28,
CDR7D28MN and CDRH105R Series
RLF7030 and VLCF4020 Series
WE-PD and WE-PD2 Series
www.tdk.com
www.we-online.com
TDK
Würth
Minimum Inductance:
Although there can be a tradeoff
with efficiency, it is often desirable to minimize board
space by choosing smaller inductors. When choosing an
inductor, there are two conditions that limit the minimum
inductance; (1) providing adequate load current, and (2)
avoidance of subharmonic oscillation.
Adequate Load Current:
Small value inductors result in
increased ripple currents and thus, due to the limited peak
switch current, decrease the average current that can be
provided to a load (I
OUT
). In order to provide adequate
load current, L should be at least:
DC • V
IN
L
>
| V
OUT
| • I
OUT
2(f) I
LIM
V
IN
•
3580fc
9
LINER [ LINEAR TECHNOLOGY ]
