LT1375/LT1376
U
W U U
APPLICATIONS INFORMATION
R
FB
LT1375/LT1376
OUTPUT
V
SW
2.38V
+
–
IN
INPUT
STANDBY
R
HI
3.5µA
+
SHDN
+
–
TOTAL
SHUTDOWN
R
LO
C1
0.37V
GND
1375/76 F04
Figure 4. Undervoltage Lockout
or latch low under low source voltage conditions. UVLO
prevents the regulator from operating at source voltages
where these problems might occur.
RLO V − 2.38 ∆V/ V + 1 + ∆V
(
)
IN
OUT
[
]
RHI =
2.38 −R2 3.5µA
(
)
Threshold voltage for lockout is about 2.38V, slightly less
than the internal 2.42V reference voltage. A 3.5µA bias
current flows out of the pin at threshold. This internally
generated current is used to force a default high state on
the shutdown pin if the pin is left open. When low shut-
down current is not an issue, the error due to this current
can be minimized by making RLO 10k or less. If shutdown
currentisanissue, RLO canberaisedto100k, buttheerror
due to initial bias current and changes with temperature
should be considered.
R = R
V
/
∆V
(
HI)(
)
FB
OUT
25k suggested for RLO
VIN = Input voltage at which switching stops as input
voltage descends to trip level
∆V = Hysteresis in input voltage level
Example: output voltage is 5V, switching is to stop if input
voltage drops below 12V and should not restart unless
input rises back to 13.5V. ∆V is therefore 1.5V and VIN =
12V. Let RLO = 25k.
R = 10k to 100k 25k suggested
(
)
LO
25k 12 − 2.38 1.5/ 5 + 1 + 1.5
(
)
[
]
RHI =
RLO V − 2.38V
(
)
IN
2.38 − 25k 3.5µA
RHI =
(
)
2.38V −RLO 3.5µA
(
)
25k 10.41
(
)
=
= 114k
VIN = Minimum input voltage
2.29
R = 114k 5/ 1.5 = 380k
(
)
FB
Keep the connections from the resistors to the shutdown
pin short and make sure that interplane or surface capaci-
tance to the switching nodes are minimized. If high resis-
tor values are used, the shutdown pin should be bypassed
with a 1000pF capacitor to prevent coupling problems
from the switch node. If hysteresis is desired in the
undervoltage lockout point, a resistor RFB can be added to
the output node. Resistor values can be calculated from:
SWITCH NODE CONSIDERATIONS
For maximum efficiency, switch rise and fall times are
made as short as possible. To prevent radiation and high
frequency resonance problems, proper layout of the com-
ponents connected to the switch node is essential. B field
13756fd
15
Linear [ Linear ]
