LT3653
APPLICATIONS INFORMATION
Battery Charger Operation
components, and tie this ground plane to system ground
at one location, ideally at the ground terminal of the output
capacitor C2. Make the SW and BOOST nodes as short
as possible. Include vias near the exposed GND pad of
the LT3653 to help remove heat from the LT3653 to the
ground plane.
Connect the control node, V pin, of the LT3653 to the
C
V pin of the battery charger power path controller. The
C
V node is internally clamped; however, take care not to
C
overdrive the pin. The LT3653 is internally compensated
with a pole zero combination on the output of the g
m
amplifier, G1. Check stability over the full input voltage
range, output load range and temperature.
High Temperature Considerations
The die temperature of the LT3653 must not exceed
the maximum rating of 125°C. This is generally not a
concern unless the ambient temperature is above 85°C.
For higher temperatures, take care in the layout of the
circuit to ensure good heat sinking of the LT3653. Derate
the maximum load current as the ambient temperature
approaches 125°C. The die temperature is calculated by
multiplying the LT3653 power dissipation by the thermal
resistance from junction to ambient. Power dissipation
within the LT3653 is estimated by calculating the total
powerlossfromanefficiencymeasurementandsubtracting
the catch diode loss. Thermal resistance depends on the
layout of the circuit board, but 64°C/W is typical for the
(2mm × 3mm) DFN (DCB) package.
Connect the HVOK node of the LT3653 to the high voltage
present pin of the charger. This is the WALL pin on the
LTC4098. The HVOK pin is capable of supplying up to 1mA
of drive current. When the HVOK pin is low the LT3653 is
not switching and the system output cannot be supported
by the LT3653 regulator. See the Typical Applications sec-
tion for different configurations.
PCB Layout
Proper operation and minimum EMI requires a careful
printed circuit board layout. Figure 1 shows the recom-
mended component placement with trace, ground plane
and via locations. Note that large, switched currents flow
in the LT3653’s V and SW pins, the catch diode (D1)
IN
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and the input capacitor (C1). Keep the loop formed by
these components as small as possible and tied to system
ground in only one place. Place these components, along
with the inductor and output capacitor, on the same side
of the circuit board, with their connections made on that
layer. Place a local, unbroken ground plane below these
Application Notes 19, 35 and 44 contain more detailed
descriptions and design information for Buck regulators
and other switching regulators. The LT1376 data sheet
has a more extensive discussion of output ripple, loop
compensation and stability testing.
GND
V
IN
C1
TO CHARGER:
HVOK
8
1
C3
7
6
5
2
3
4
V
C
C2
R
ILIM
V
OUT
3653 F01
Figure 1. LT3653 PCB Layout
3653f
9
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