LT3472
PI FU CTIO S
SWP (Pin 1):
Switch Pin for Positive (Boost) Channel.
Connect boost inductor here.
V
IN
(Pin 2):
Input Supply Pin. Must be locally bypassed
with a X5R or X7R type ceramic capacitor.
SHDN (Pin 3):
Shutdown Pin. Connect to 0.8V or higher to
enable device, 0.3V or less to disable device.
SWN (Pin 4):
Switch Pin for Negative (Inverter) Channel.
Connect inverter input inductor and flying capacitor here.
DN (Pin 5):
Anode of Internal Schottky for Inverter.
Connect inverter output inductor and flying capacitor
here.
FBN (Pin 6):
Feedback Pin for Inverter. Connect feedback
resistor R2 from this pin to V
O2
. Choose R2 according to
V
O2
= 1.25 • R2/50k. Pin voltage = 0V when regulated.
SSN (Pin 7):
Soft Start-Up Pin for Inverter. Connect a cap
here for soft start-up. Leave open for quick start-up. This
pin is connected to 1.25V with a 50k resistor internally.
FBP (Pin 8):
Feedback Pin for Boost. Connect boost
feedback resistor R1 from this Pin to V
O1
. Choose R1
according to V
O1
= 1.25 • (1 + R1/50k). Pin voltage = 1.25V
when regulated.
SSP (Pin 9):
Soft Start-Up Pin for Boost. Connect a cap
here for soft start-up. Leave open for quick start-up. This
pin is connected to 1.25V with a 50k resistor internally.
V
POS
(Pin 10):
Output Pin for Boost. Connect boost output
capacitor here.
GND (Exposed Pad) (Pin 11):
GND Pin. Tie directly to
ground plane through multiple vias under the package for
optimum thermal performance.
BLOCK DIAGRA
FBP 8
50k
V
IN
2
V
REF
1.25V
FBN 6
SSN
7
50k
1.25V
50k
SSP
9
W
U
U
U
SWP
1
–
A1
COMPARATOR
DP
X1
DRIVER 1
Q
S
Q1
10 V
POS
–
A2
+
+
∑
R
–
+
RAMP
GENERATOR
11 GND
50k
1.2MHz
OSCILLATOR
COMPARATOR
A3
3
SHDN
+
–
–
A4
X2
R
S
Q
DRIVER 2
Q2
4
SWN
+
–
∑
+
RAMP
GENERATOR
DN
5
DN
3472 BD
Figure 1. LT3472 Block Diagram
3472f
5
LINER [ LINEAR TECHNOLOGY ]
