Figure 1. Operational Amplifier Protection
Input Differential Voltage limited to 0.8V (typ) by JPADs D
1
and D
2
. Common
Mode Input voltage limited by JPADs D
3
and D
4
to ±15V.
Figure 2. Sample and Hold Circuit
Typical Sample and Hold circuit with clipping. JPAD diodes reduce offset
voltages fed capacitively from the JFET switch gate.
FIGURE 2
+V
JPAD20
D1
D3
D2
D4
-
OP-27
+
FIGURE 1
-V
D2
+V
JPAD5
D1
2N4117A
2N4393
C
R
V
OUT
e
in
CONTROL
SIGNAL
+15V -15V
TO-72
Three Lead
0.89
1.03
SOT-23
1
1.78
2.05
0.37
0.51
3
2.80
3.04
2
1.20
1.40
2.10
2.64
0.085
0.180
0.89
1.12
0.013
0.100
0.55
DIMENSIONS IN
MILLIMETERS
1.
2.
Absolute maximum ratings are limiting values above which serviceability may be impaired.
The PAD type number denotes its maximum reverse current value in pico amperes. Devices with I
R
values intermediate to those shown
are available upon request.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing
high-quality discrete components. Expertise brought to LIS is based on processes and products developed
at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,
a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,
co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.
Linear Integrated Systems
•
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201142 11/01/12 Rev#A6 ECN# PAD SERIES
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