LTC3410
W U U
U
APPLICATIO S I FOR ATIO
1
2
3
1
RUN
RUN
LTC3410-1.875
LTC3410
2
6
4
6
GND
V
OUT
GND
V
FB
–
+
–
+
C
OUT
V
OUT
C
V
OUT
R2
R1
OUT
3
4
SW
V
IN
SW
V
IN
L1
L1
C
FWD
5
5
C
IN
C
IN
V
IN
V
IN
3410 F04b
3410 F04a
BOLD LINES INDICATE HIGH CURRENT PATHS
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 4a. LTC3410 Layout Diagram
Figure 4b. LTC3410-1.875 Layout Diagram
VIA TO GND
R1
V
OUT
V
V
OUT
V
IN
IN
VIA TO V
VIA TO V
LTC3410
IN
IN
VIA TO V
OUT
R2
PIN 1
PIN 1
L1
L1
C
FWD
LTC3410-
1.875
SW
SW
C
OUT
C
IN
C
OUT
C
IN
GND
3410 F05b
3410 F05a
Figure 5b. LTC3410 Fixed Output Voltage
Suggested Layout
Figure 5a. LTC3410 Suggested Layout
2. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of COUT and ground.
Design Example
As a design example, assume the LTC3410 is used in a
single lithium-ion battery-powered cellular phone
application. The VIN will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.3A but most of the time it will be in
standbymode, requiringonly2mA. Efficiencyatbothlow
and high load currents is important. Output voltage is
3V. With this information we can calculate L using
Equation (1),
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the (–) plates of CIN and COUT as close as possible.
5. Keep the switching node, SW, away from the sensitive
VFB node.
⎛
⎝
⎞
1
f ∆I
VOUT
L=
VOUT 1−
(3)
⎜
⎟
⎠
V
L
IN
3410fb
12
Linear [ Linear ]
