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FDKMIPF2520D 参数 Datasheet PDF下载

FDKMIPF2520D图片预览
型号: FDKMIPF2520D
PDF下载: 下载PDF文件 查看货源
内容描述: 2.25MHz的, 300毫安同步降压型 [2.25MHz, 300mA Synchronous Step-Down]
分类和应用:
文件页数/大小: 16 页 / 307 K
品牌: Linear [ Linear ]
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LTC3410  
W U U  
U
APPLICATIO S I FOR ATIO  
whereL1, L2, etc. aretheindividuallossesasapercentage  
2. I2R losses are calculated from the resistances of the  
internal switches, RSW, and external inductor RL. In  
continuous mode, the average output current flowing  
through inductor L is “chopped” between the main  
switch and the synchronous switch. Thus, the series  
resistance looking into the SW pin is a function of both  
top and bottom MOSFET RDS(ON) and the duty cycle  
(DC) as follows:  
of input power.  
Although all dissipative elements in the circuit produce  
losses, two main sources usually account for most of the  
losses in LTC3410 circuits: VIN quiescent current and I2R  
losses. The VIN quiescent current loss dominates the  
efficiency loss at very low load currents whereas the I2R  
loss dominates the efficiency loss at medium to high load  
currents. In a typical efficiency plot, the efficiency curve at  
very low load currents can be misleading since the actual  
power lost is of no consequence as illustrated in Figure 3.  
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)  
The RDS(ON) for both the top and bottom MOSFETs can  
beobtainedfromtheTypicalPerformanceCharateristics  
curves. Thus, to obtain I2R losses, simply add RSW to  
RL and multiply the result by the square of the average  
output current.  
1. The VIN quiescent current is due to two components:  
the DC bias current as given in the electrical character-  
istics and the internal main switch and synchronous  
switch gate charge currents. The gate charge current  
results from switching the gate capacitance of the  
internal power MOSFET switches. Each time the gate is  
switched from high to low to high again, a packet of  
charge, dQ, moves from VIN to ground. The resulting  
dQ/dtisthecurrentoutofVINthatistypicallylargerthan  
the DC bias current. In continuous mode,  
IGATECHG = f(QT + QB) where QT and QB are the  
gate charges of the internal top and bottom  
switches. Both the DC bias and gate charge  
losses are proportional to VIN and thus their effects will  
be more pronounced at higher supply voltages.  
Other losses including CIN and COUT ESR dissipative  
losses and inductor core losses generally account for less  
than 2% total additional loss.  
Thermal Considerations  
In most applications the LTC3410 does not dissipate  
much heat due to its high efficiency. But, in applications  
where the LTC3410 is running at high ambient  
temperature with low supply voltage and high duty  
cycles, such as in dropout, the heat dissipated may  
exceed the maximum junction temperature of the part. If  
1
V
= 3.6V  
IN  
0.1  
0.01  
0.001  
V
V
V
= 3.3V  
= 1.8V  
= 1.2V  
OUT  
OUT  
OUT  
0.0001  
0.00001  
0.1  
1
10  
100  
1000  
LOAD CURRENT (mA)  
3410 F03  
Figure 3. Power Loss vs Load Current  
3410fb  
10