LT3506/LT3506A
U U
W U
APPLICATIO S I FOR ATIO
PARASITIC DIODE
D4
tor on RUN/SS2. This allows the LT3506 to start up and
enable its power good comparator before RUN/SS2 gets
highenoughtoallowchannel2tostartswitching. Channel
2onlyoperateswhenitisenabledwiththeexternalcontrol
signals and output 1 is in regulation. The circuit in Figure
5a leaves both power good indicates free. However, the
circuits in Figures 5b and 5c have another advantage. As
well as sequencing the two outputs at start-up, they also
disable channel 2 if output 1 falls out of regulation (due
to a short circuit or a collapsing input voltage).
V
SW
IN
V
V
OUT
IN
LT3506
3506 F06
Figure 6. Shorted Input Protection
and needs to generate 12V and 2.5V, it would be more
efficient to generate the 2.5V output from the 5V supply
and the 12V output from the 18V supply. The LT3506 can
step down 18V to 2.5V, but the efficiency would be lower
than stepping down from 5V to 2.5V.
Finally, be aware that the circuit in Figure 5d does not
work,becausethepowergoodcomparatorsaredisabledin
shutdown. When the system is placed in shutdown mode
by pulling down on RUN/SS1, then output 1 will go low,
PG1 will pull down on RUN/SS2, and the LT3506 will enter
its low current shutdown state. This disables PG1, and
RUN/SS2rampsupagaintoenabletheLT3506.Thecircuit
will oscillate and pull extra current from the input.
This feature can also be used when the maximum step-
down ratio is exceeded. In this case, V can be tied to
IN2
IN
V
for applications requiring high V to V
ratios. A
OUT1
OUT
dual step-down application steps down the input voltage
(V ) to the highest output voltage then uses that voltage
IN1
to power the second channel (V ). V
must be able
IN2
OUT1
Multiple Input Supplies
to provide enough current for its output plus the average
current drawn from V
. Note that the V
must be
OUT2
OUT1
The internal supplies of the LT3506 operate from V . It is
IN1
above minimum input voltage for V when the second
IN2
possible to supply V from a different source, provided
IN2
channel starts to switch. Delaying the second channel can
be accomplished by either using independent soft-start
capacitors or sequencing with the PG1 output. The Two
StageStep-DowncircuitintheApplicationssectionshows
an example of the latter approach.
V
IN1
is above the minimum supply level whenever V is
IN2
present. This could be used when a system has two pri-
mary supplies available. It is more efficient to generate the
desired outputs with the lowest step-down ratio possible.
For example, if a system has 18V and 5V power available
V
SW
V
IN
SW
IN
GND
GND
(7a)
(7b)
V
SW
L1
V
SW
IN
I
C1
C1
D1
C2
GND
3506 F07
(7c)
Figure 7. Subtracting the Current when the Switch is ON (a) From the Current when the Switch in OFF (b) Reveals the Path
of the High Frequency Switching current (c) Keep This Loop Small. The Voltage on the SW and BOOST Nodes will also be
Switched; Keep these Nodes as Small as Possible. Finally, Make Sure the Circuit is Shielded with a Local Ground Plane.
3506afb
ꢀꢅ
Linear [ Linear ]
