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3506AIFE 参数 Datasheet PDF下载

3506AIFE图片预览
型号: 3506AIFE
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道单片式1.6A降压型开关稳压器 [Dual Monolithic 1.6A Step-Down Switching Regulator]
分类和应用: 稳压器开关
文件页数/大小: 24 页 / 680 K
品牌: Linear [ Linear ]
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LT3506/LT3506A  
U U  
W
APPLICATIO S I FOR ATIO  
supply or glitching the input supply when the LT3506 is  
enabled. The RUN/SS pins do not provide an accurate  
delaytostartoranaccuratelycontrolledrampattheoutput  
voltage, both of which depend on the output capacitance  
and the load current. However, the power good indicators  
can be used to sequence the two outputs, as described  
below.  
Output Sequencing  
The PG and RUN/SS pins can be used to sequence the  
two outputs. Figure 5 shows several circuits to do this. In  
each case channel 1 starts first. Note that these circuits  
sequence the outputs during start-up. When shut down  
the two channels turn off simultaneously. In Figure 5a, a  
largercapacitoronRUN/SS2delayschannel2withrespect  
to channel 1. The soft-start capacitor on RUN/SS2 should  
be at least twice the value of the capacitor on RUN/SS1.  
A larger ratio may be required, depending on the output  
capacitance and load on each channel. Make sure to test  
the circuit in the system before deciding on final values  
for these capacitors. The circuit in Figure 5b requires the  
fewest components, with both channels sharing a single  
soft-start capacitor. The power good comparator of chan-  
nel 1 disables channel 2 until output 1 is in regulation. For  
independent control of channel 2, use the circuit in Figure  
5c. The capacitor on RUN/SS1 is smaller than the capaci-  
Power Good Indicators  
The PG pin is the open collector output of an internal  
comparator. PG remains low until the FB pin is within  
10% of the final regulation voltage. Tie the PG pin to any  
supply with a pull-up resistor that will supply less than  
250μA. Note that this pin will be open when the LT3506 is  
placed in shutdown mode (both RUN/SS pins at ground)  
regardless of the voltage at the FB pin. Power good is valid  
when the LT3506 is enabled (either RUN/SS pin is high)  
and V is greater than ~2.4V.  
IN  
RUN/SS1  
V
C2  
RUN/SS1  
OFF ON  
1nF  
1nF  
OFF ON  
LT3506  
LT3506  
RUN/SS2  
GND  
PG1  
RUN/SS2  
GND  
2.2nF  
(5a) Channel 2 is Delayed  
(5b) Fewest Components  
RUN/SS1  
RUN/SS1  
LT3506  
1nF  
LT3506  
1nF  
OFF ON  
OFF ON  
PG1  
PG1  
RUN/SS2  
RUN/SS2  
GND  
GND  
OFF2 ON2  
1.5nF  
1.5nF  
3506 F05  
(5c) Independent Control of Channel 2  
Figure 5. Sequencing the Outputs  
(5d) Doesn't Work !  
3506afb  
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