LT3433
APPLICATIO S I FOR ATIO
Overview
The LT3433 is a high input voltage range, step-up/step-
down DC/DC converter IC using a 200kHz constant fre-
quency, current mode architecture. Dual internal switches
allow the full input voltage to be imposed across the
switched inductor, such that both step-up and step-down
modes of operation can be realized using the same single
inductor topology.
The LT3433 has provisions for high efficiency, low load
operation for battery-powered applications. Burst Mode
operation reduces average quiescent current to 100µA in
no load conditions. A low current shutdown mode can also
be activated, reducing total quiescent current to 10µA.
Much of the LT3433’s internal circuitry is biased from an
internal low voltage linear regulator. The output of this
regulator is brought out to the V
BIAS
pin, allowing bypass-
ing of the internal regulator. The associated internal
circuitry can be powered directly from the output of the
converter, increasing overall converter efficiency. Using
externally derived power also eliminates the IC’s power
dissipation associated with the internal V
IN
to V
BIAS
regulator.
Theory of Operation (See Block Diagram)
The LT3433 senses converter output voltage via the V
FB
pin. The difference between the voltage on this pin and an
internal 1.231V reference is amplified to generate an error
voltage on the V
C
pin which is, in turn, used as a threshold
for the current sense comparator.
During normal operation, the LT3433 internal oscillator
runs at 200kHz. At the beginning of each oscillator cycle,
the switch drive is enabled. The switch drive stays enabled
until the sensed switch current exceeds the V
C
-derived
threshold for the current sense comparator and, in turn,
disables the switch driver. If the current comparator
threshold is not obtained for the entire oscillator cycle, the
switch driver is disabled at the end of the cycle for 250ns.
This minimum off-time mode of operation assures regen-
eration of the V
BST
bootstrapped supply.
If the converter input and output voltages are close
together, proper operation in normal buck configuration
would require high duty cycles. The LT3433 senses this
8
U
condition as requiring a duty cycle greater than 75%. If
such a condition exists, a second switch is enabled during
the switch on time, which acts to pull the output side of the
inductor to ground. This “bridged” operation allows volt-
age conversion to continue when V
OUT
approaches or
exceeds V
IN
.
Shutdown
The LT3433 incorporates a low current shutdown mode
where all IC functions are disabled and the V
IN
current is
reduced to 10µA. Pulling the SHDN pin down to 0.4V or
less activates shutdown mode.
Burst Mode Operation
The LT3433 employs low current Burst Mode functionality
to maximize efficiency during no load and low load condi-
tions. Burst Mode function is disabled by shorting the
BURST_EN pin to either V
BIAS
or V
OUT
. Burst Mode
function is enabled by shorting BURST_EN to SGND.
When the required switch current, sensed via the V
C
pin
voltage, is below 30% of maximum, the Burst Mode
function is employed. When the voltage on V
C
drops below
the 30% load level, that level of sense current is latched
into the IC. If the output load requires less than this latched
current level, the converter will overdrive the output slightly
during each switch cycle. This overdrive condition forces
the voltage on the V
C
pin to continue to drop. When the
voltage on V
C
drops below the 15% load level, switching
is disabled, and the LT3433 shuts down most of its internal
circuitry, reducing quiescent current to 100µA. When the
voltage on the V
C
pin climbs back to 20% load level, the IC
returns to normal operation and switching resumes.
Antislope Compensation
Most current mode switching controllers use slope com-
pensation to prevent current mode instability. The LT3433
is no exception. A slope compensation circuit imposes an
artificial ramp on the sensed current to increase the rising
slope as duty cycle increases. Unfortunately, this addi-
tional ramp corrupts the sensed current value, reducing
the achievable current limit value by the same amount as
the added ramp represents. As such, current limit is
typically reduced as duty cycles increase.
3433ia
W
U U
LINER [ LINEAR TECHNOLOGY ]
