LTC3412
U
W
U U
APPLICATIO S I FOR ATIO
The junction temperature, TJ, is given by:
First, calculate the timing resistor:
3.23 •1011
TJ = TA + TR
ROSC
=
− 10k = 313k
where TA is the ambient temperature.
1•106
As an example, consider the LTC3412 in dropout at an
input voltage of 3.3V, a load current of 2.5A and an
ambient temperature of 70°C. From the typical perfor-
mance graph of switch resistance, the RDS(ON) of the P-
channel switch at 70°C is approximately 97mΩ. There-
fore, power dissipated by the part is:
Use a standard value of 309k. Next, calculate the inductor
value for about 40% ripple current at maximum VIN:
⎛
⎞
⎟
2.5V
2.5V
4.2V
⎛
⎜
⎝
⎞
⎟
⎠
L =
1−
= 1.01μH
⎜
⎝ (1MHz)(1A)⎠
Using a 1μH inductor, results in a maximum ripple current
of:
PD = (ILOAD2)(RDS(ON)) = (2.5A)2(97mΩ) = 0.61W
For the TSSOP package, the θJA is 37.6°C/W. Thus the
junction temperature of the regulator is:
⎛
⎞
2.5V
2.5V
4.2V
⎛
⎜
⎝
⎞
⎟
⎠
ΔIL =
1−
= 1.01A
⎜
⎟
(1MHz)(1μH)
⎝
⎠
TJ = 70°C + (0.61W)(37.6°C/W) = 93°C
which is below the maximum junction temperature of
125°C.
COUT will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. In this application,
two tantalum capacitors will be used to provide the bulk
capacitanceandaceramiccapacitorinparalleltolowerthe
total effective ESR. For this design, two 100μF tantalum
capacitors in parallel with a 10μF ceramic capacitor will be
used. CIN shouldbesizedforamaximumcurrentratingof:
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD(ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
dischargeCOUT generatingafeedbackerrorsignalusedby
the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. The ITH pin external components and output capaci-
tor shown in Figure 1 will provide adequate compensation
for most applications.
2.5V 4.2V
⎛
⎜
⎝
⎞
IRMS= 2.5A
− 1 = 1.23ARMS
(
)
⎟
⎠
4.2V 2.5V
Decoupling the PVIN and SVIN pins with a 22μF ceramic
capacitor and a 220μF tantalum capacitor is adequate for
most applications.
The burst clamp and output voltage can now be pro-
grammed by choosing the values of R1, R2 and R3. The
voltageontheMODEpinwillbesetto0.32Vbytheresistor
divider consisting of R2 and R3. A burst clamp voltage of
0.32V will set the minimum inductor current, IBURST, as
follows:
Design Example
As a design example, consider using the LTC3412 in an
application with the following specifications: VIN = 2.7V to
4.2V, VOUT = 2.5V, IOUT(MAX) = 2.5A, IOUT(MIN) = 10mA, f
= 1MHz. Because efficiency is important at both high and
low load current, Burst Mode operation will be utilized.
3.75V
0.8V
⎛
⎜
⎝
⎞
⎟
⎠
IBURST= 0.32V − 0.2V
= 563mA
(
)
3412fb
13
Linear [ Linear ]
