LTC1735
U
W
U U
APPLICATIO S I FOR ATIO
At full load current:
The Thevenin equivalent of the gain limiting resistance
value of 17.54k is made up of a resistor R4 that sources
current into the ITH pin and resistor R1 that sinks current
to SGND.
5AP−P
V
=
15A +
• 0.084V/A + 0.3V
ITH(MAX)
2
To calculate the resistor values, first determine the ratio
between them:
= 1.77V
At minimum load current:
V
INTVCC – V
5.2V – 1.085V
1.085V
ITH(NOM)
k =
=
= 3.79
2AP−P
2
V
ITH(NOM)
V
=
0.2A +
• 0.084V/A + 0.3V
ITH(MIN)
VINTVCC is equal to VEXTVCC or 5.2V if EXTVCC is not used.
Resistor R4 is:
= 0.40V
In this circuit, VITH changes from 0.40V at light load to
1.77V at full load, a 1.37V change. Notice that ∆IL, the
peak-to-peak inductor current, changes from light load to
full load. Increasing the DC inductor current decreases the
permeability of the inductor core material, which de-
creases the inductance and increases ∆IL. The amount of
inductance change is a function of the inductor design.
R4 = (k +1)•RITH = (3.79 +1)•17.54 = 84.0k
Resistor R1 is:
(k + 1)•RITH (3.79 + 1)•17.54k
R1=
=
= 22.17k
k
3.79
Unfortunately,PCBnoisecanaddtothevoltagedeveloped
across the sense resistor, R5, causing the ITH pin voltage
to be slightly higher than calculated for a given output
current. The amount of noise is proportional to the output
current level. This PCB noise does not present a serious
problem but it does change the effective value of R5 so the
calculated values of R1 and R4 may need to be adjusted to
achieve the required results. Since PCB noise is a function
ofthelayout,itwillbethesameonallboardswiththesame
layout.
To create the ±30mV input offset, the gain of the error
amplifier must be limited. The desired gain is:
∆V
1.37V
ITH
AV =
=
= 22.8
Input Offset Error 2(0.03V)
Connectingaresistortotheoutputofthetransconductance
error amplifier will limit the voltage gain. The value of this
resistor is:
AV
22.8
RITH
=
=
= 17.54k
Figures 9 and 10 show the transient response before and
after active voltage positioning is implemented. Notice
that active voltage positioning reduced the transient re-
Error Amplifier gm 1.3mS
To center the output voltage variation, VITH must be
centered so that no ITH pin current flows when the output
voltage is nominal. VITH(NOM) is the average voltage be-
tween VITH at maximum output current and minimum
output current:
sponse from almost 200mVP-P to a little over 100mVP-P
.
Refer to Design Solutions 10 for more information about
active voltage positioning.
V
ITH(MAX) – V
ITH(MIN)
V
=
=
+ V
ITH(MIN)
ITH(NOM)
2
1.77V – 0.40V
+ 0.40V = 1.085V
2
1735fc
24
Linear [ Linear ]
