LTC1735
U
W U U
APPLICATIO S I FOR ATIO
CIN Selection
ThefirstconditionrelatestotheripplecurrentintotheESR
of the output capacitance while the second term guaran-
tees that the output capacitance does not significantly
discharge during the operating frequency period due to
ripple current. The choice of using smaller output capaci-
tance increases the ripple voltage due to the discharging
term but can be compensated for by using capacitors of
very low ESR to maintain the ripple voltage at or below
50mV. The ITH pin OPTI-LOOP compensation compo-
nents can be optimized to provide stable, high perfor-
mancetransientresponseregardlessoftheoutputcapaci-
tors selected.
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle VOUT
/
VIN. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
1/2
V
V
V
IN
V
OUT
OUT
I
I
– 1
RMS O(MAX)
IN
This formula has a maximum at VIN = 2VOUT, where
RMS = IO(MAX)/2. This simple worst case condition is com-
I
The selection of output capacitors for CPU or other appli-
cations with large load current transients is primarily
determined by the voltage tolerance specifications of the
load. The resistive component of the capacitor, ESR,
multiplied by the load current change plus any output
voltage ripple must be within the voltage tolerance of the
load (CPU).
monlyusedfordesignbecauseevensignificantdeviationsdo
not offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours of
life. This makes it advisable to further derate the capacitor or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design. Always consult the
manufacturer if there is any question.
The required ESR due to a load current step is:
RESR < ∆V/∆I
COUT Selection
where∆Iisthechangeincurrentfromfullloadtozeroload
(orminimumload)and∆Vistheallowedvoltagedeviation
(not including any droop due to finite capacitance).
The selection of COUT is primarily determined by the
effective series resistance (ESR) to minimize voltage
ripple. The output ripple (∆VOUT) in continuous mode is
determined by:
The amount of capacitance needed is determined by the
maximum energy stored in the inductor. The capacitance
mustbesufficienttoabsorbthechangeininductorcurrent
when a high current to low current transition occurs. The
oppositeloadcurrenttransitionisgenerallydeterminedby
the control loop OPTI-LOOP components, so make sure
not to over compensate and slow down the response. The
minimum capacitance to assure the inductors’ energy is
adequately absorbed is:
1
∆VOUT ≈ ∆IL ESR +
8fCOUT
Where f = operating frequency, COUT = output capaci-
tance and ∆IL = ripple current in the inductor. The output
ripple is highest at maximum input voltage since ∆IL
increases with input voltage. Typically, once the ESR
requirement for COUT has been met, the RMS current
ratinggenerallyfarexceedstheIRIPPLE(P–P) requirement.
With∆IL=0.3IOUT(MAX) andallowing2/3oftherippledue
toESRtheoutputripplewillbelessthan50mVatmaxVIN
assuming:
L(∆I)2
2(∆V)VOUT
COUT
>
where ∆I is the change in load current.
COUT required ESR < 2.2 RSENSE
Manufacturers such as Nichicon, United Chemi-Con and
Sanyo can be considered for high performance through-
hole capacitors. The OS-CON semiconductor electrolyte
COUT > 1/(8fRSENSE
)
1735fc
14
Linear [ Linear ]
