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1402I 参数 Datasheet PDF下载

1402I图片预览
型号: 1402I
PDF下载: 下载PDF文件 查看货源
内容描述: 串行12位, 2.2Msps采样ADC ,带有关断 [Serial 12-Bit, 2.2Msps Sampling ADC with Shutdown]
分类和应用:
文件页数/大小: 24 页 / 281 K
品牌: Linear [ Linear ]
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LTC1402  
U
W U U  
APPLICATIONS INFORMATION  
INTERNAL REFERENCE  
ADC can then be adjusted to match the peak input signal,  
maximizing the signal-to-noise ratio. The filtering of the  
internal LTC1402 reference amplifier will limit the band-  
width and settling time of this circuit. A settling time of  
5ms should be allowed after a reference adjustment.  
The LTC1402 has an on-chip, temperature compensated,  
curvature corrected, bandgap reference that is factory  
trimmedto2.048V.Itisconnectedinternallytoareference  
amplifier, see Figure 4. The reference amplifier amplifies  
the voltage at the VREF pin by 2 to create the required  
internal reference voltage of 4.096V. This provides buffer-  
ing for the high speed capacitive DAC. The reference  
amplifier output VREF, (Pin 5) must be bypassed with a  
capacitor to ground. The reference amplifier is stable with  
capacitors of 1µF or greater. For the best noise perfor-  
mance, a 10µF ceramic or a 10µF tantalum in parallel with  
a 0.1µF ceramic is recommended.  
DIFFERENTIAL INPUTS  
The LTC1402 has a unique differential sample-and-hold  
circuit that allows inputs from –2.5V to 5V. The ADC will  
always convert the difference of AIN+ – AIN independent  
of the common mode voltage. The common mode rejec-  
tion holds up at extremely high frequencies, see Figure 7.  
The only requirement is that both inputs not exceed  
2.5V or 5V. Integral nonlinearity errors (INL) and differ-  
ential nonlinearity errors (DNL) are independent of the  
common mode voltage. However, the bipolar zero error  
(BZE) will vary. The change in BZE is typically less than  
0.1% of the common mode voltage. Figure 5b shows the  
use of bipolar mode with single 5V supply.  
The VREF pin can be driven with an external reference as  
shown in Figure 5a. The GAIN pin (Pin 7) is tied to the  
positive supply to disable the internal reference buffer.  
A DAC may also be used to drive VREF as shown in  
Figure 6. This is useful in applications where the peak  
input signal amplitude may vary. The input span of the  
5V  
3
4
5
6
7
V
IN  
2.5V ±2.048V  
+
LTC1402  
A
A
V
IN  
2.048V  
BANGAP  
+
REFERENCE  
V
IN  
5
V
REF  
4.096V  
2.5V  
REFERENCE  
IN  
AMP  
LT1019-2.5  
10µF  
LTC1402  
8
5V  
BIP  
REF  
10µF  
64k  
10µF  
64k  
14  
GAIN  
7
6
AGND2  
GAIN  
V
SS  
AGND2  
1402 F04  
1402 F04a  
Figure 4. LTC1402 Reference Circuit  
Figure 5b. Bipolar Mode with Single Supply  
5V  
3
+
3
+
A
A
IN  
IN  
ANALOG INPUT  
ANALOG INPUT  
V
IN  
4
4
A
A
IN  
IN  
LT1019-2.5  
V
LTC1402  
LTC1402  
5
5
6
7
V
LTC1451  
V
OUT  
REF  
REF  
10µF  
10µF  
6
7
AGND2  
GAIN  
AGND2  
GAIN  
5V  
5V  
1402 F04a  
1402 F06  
Figure 6. Driving VREF with a 12 Bit, VOUT DAC  
Figure 5a. Using the LT1019-2.5 as an External Reference  
12