LTC1402
W U
W
TI I G DIAGRA S
t
2
t
7
t
3
1
2
3
4
5
6
7
8
9
10
11
12
13
15
16
1
2
14
SCK
t
t
t
5
4
CONV
t
6
0
INTERNAL
S/H STATUS
SAMPLE
HOLD
SAMPLE
HOLD
t
t
8
8a
D
REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION
OUT
Hi-Z
Hi-Z
D
OUT
REF D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
REF
REFRDY BIT + 12-BIT DATA WORD
t
CONV
t
1402 TD01
THROUGHPUT
Nap Mode and Sleep Mode Waveforms
SCK
t
1
t
1
CONV
NAP
SLEEP
t
12
V
REF
t
11
REFRDY
1402 TD02
NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS. REFRDY APPEARS AS A BIT IN THE D
WORD.
OUT
SCK to DOUT Delay
SCK
SCK
V
V
IH
IH
t
10
8
t
t
9
V
V
90%
10%
OH
OL
D
D
OUT
OUT
1402 TD03
9
Linear [ Linear ]
