LTM4641
ELECTRICAL CHARACTERISTICS
SYMBOL
t
UVOVD
I
UVOV
V
HOUSEKEEPING(UVLO)
V
HYST(SWITCHING ON)
V
HYST(SWITCHING OFF,
RUN)
The
l
denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at T
A
= 25°C (Note 2). V
IN
= V
INH
= V
INL
= 28V, per the typical application
shown in Figure 45, unless otherwise noted.
PARAMETER
UVLO/OVLO/IOVRETRY/ TEMP
Response Time
Input Current of UVLO, OVLO and
IOVRETRY
Housekeeping Circuitry UVLO
HYST Voltage (M
HYST
Off, RUN
Logic High)
HYST Voltage (M
HYST
Off, RUN
Logic Low)
HYST Voltage, Switching Action
Inhibited (M
HYST
On)
CONDITIONS
±50mV Overdrive (All Pins)
±5mV Overdrive, UVLO/OVLO/IOVRETRY Pins
Only (Note 4)
UVLO = 0.55V or OVLO = 0.45V or
IOVRETRY = 0.45V
Voltage on INTV
CC
, INTV
CC
Rising (Note 4)
Hysteresis, INTV
CC
Returning (Note 4)
RUN Electrically Open Circuit
RUN = 1.8V
RUN = 0V
UVLO < UVOV
TH
or OVLO > UVOV
TH
or
IOVRETRY > UVOV
TH
or TEMP < OT
TH(INCEPTION)
or CROWBAR > V
CROWBAR(TH)
or
DRV
CC
< DRVCC
UVLO(FALLING)
(See Figures 62, 63)
C
TMR
= 1nF Time from Fault Clearing to HYST
,
Being Released by Internal Circuitry
l
l
l
l
l
MIN
50
l
TYP
25
125
MAX
100
500
±30
UNITS
µs
µs
nA
V
mV
V
V
mV
mV
1.9
5
4.9
1.85
170
2
25
5.1
2.1
350
30
2.1
50
5.25
2.35
480
65
V
HYST(SWITCHING OFF,
FAULT)
TMR
UOTO
V
LATCH(IH)
V
LATCH(IL)
I
LATCH
I
TMR(UP)
I
TMR(DOWN)
V
TMR(DIS)
OTBH
VIL
OTBH
VZ
I
OTBH(MAX)
Timeout and Power-On Reset Period
LATCH
Clear Threshold Input High
LATCH
Clear Threshold Input Low
LATCH
Input Current
TMR Pull-Up Current
TMR Pull-Down Current
Timer Disable Voltage
OTBH Low Level Input Voltage
OTBH Pin Voltage When Left
Electrically Open Circuit
Maximum OTBH Current
l
l
l
5
1.2
9
14
ms
V
0.8
±1
–1.2
1.2
–180
0.6
–2.1
2.1
–270
0.4
0.9
1.2
30
–2.8
2.8
V
μA
μA
μA
mV
V
V
μA
V
LATCH
= 7.5V
V
TMR
= 0V
V
TMR
= 1.6V
Referenced to INTV
CC
–10μA ≤ I
OTBH
≤ 10μA
OTBH Electrically Shorted to SGND
l
l
l
l
l
l
l
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
The LTM4641 SW absolute maximum rating of 40V is verified in ATE by
regulating V
OUT
while at 40V
IN
, in a controlled manner guaranteed to not
affect device reliability or lifetime. Static testing of SW leakage current at
40V
IN
is performed at control IC wafer level only.
Note 2:
The LTM4641 is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTM4641E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTM4641I is guaranteed over the –40°C to 125°C operating junction
temperature range. The LTM4641MP is tested and guaranteed over the
full –55°C to 125°C operating temperature range. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors.
Note 3:
See output current derating curves for different V
IN
, V
OUT
and T
A
.
Note 4:
100% tested at wafer level only.
4641f
7
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