LT8697
applicaTions inForMaTion
Cable Drop Compensation
of the LT8697’s output. If R
is changed, C
should
CDC
CDC
also be changed to maintain roughly the same 10µs RC
time constant. If the capacitance across the remote load
is large compared to the LT8697 output capacitor tied to
TheLT8697includesthenecessarycircuitrytoimplement
cabledropcompensation.Cabledropcompensationallows
the regulator to maintain 5V regulation on the USB V
LOAD
the SYS pin, a longer R
• C
time constant may be
CDC
CDC
despite high cable resistance. The LT8697 increases its
necessary for stability depending on the amount of cable
drop compensation used. Output stability should always
be verified in the end application circuit.
local output voltage V above 5V as the load increases
OUT
to keep V
regulated to 5V. This compensation does
LOAD
not require running an additional pair of Kelvin sense
wires from the regulator to the load, but does require the
The LT8697 limits the maximum voltage of V
limiting the voltage on the SYS pin V
by
OUT
system designer to know the cable resistance R
the LT8697 does not sense this value.
as
to 5.8V. If the
CABLE
SYS
cable drop compensation is programmed to compensate
for more than 0.8V of cable drop at the maximum I
,
LOAD
Program the cable drop compensation using the follow-
ing ratio:
this V
maximum will prevent V
from rising higher
SYS
OUT
and the voltage at the point of load will drop below 5V.
The following equation shows how to derive the LT8697
RSENSE •RCDC
RCBL = 20.55 •
output voltage V
:
RCABLE
OUT
20.55 •ILOAD•RSENSE •RCDC
RCBL
where R
is a resistor tied between the regulator output
VOUT = 5V+
CDC
and the USB5V pin, R
is a resistor tied between the
CBL
SENSE
RCBL pin and GND, R
is the sense resistor tied be-
As stated earlier, the LT8697’s cable drop compensation
feature does not allow V to exceed the SYS regula-
tweentheISP and ISN pinsinseries between the regulator
output and the load, and R is the cable resistance.
OUT
CABLE
tion point of 5.8V. If additional impedance is placed in
R
SENSE
is typically chosen based on the desired current
between the SYS pin and the OUT node such as R
SENSE
limit and is typically 20mΩ for 2.1A systems and 50mΩ
for 0.9A. Please see the Setting the Current Limit section
for more information.
or a USB Switch, the voltage drop through these imped-
ances at the maximum I must also be factored in to
LOAD
this maximum allowable V
value. Refer to Figure 1
to see how cable drop
OUT
and V
The current flowing into the USB5V pin through R
identical to the current flowing out of the R
While the ratio of these two resistors should be chosen
per the equation above, choose the absolute values of
these resistors to keep this current between about 30µA
and 200µA at full load current. This restriction results in
is
for load lines of V
CDC
OUT
LOAD
resistor.
compensation works.
CBL
6.0
R
R
R
R
= 0.3Ω
CABLE
SENSE
CDC
CBL
= 20mΩ
5.8
5.6
5.4
5.2
5.0
4.8
= 10kΩ
= 13.7kΩ
R
and R
values between 5k and 33k. If I
is
CBL
CDC
USB5V
too low, capacitive loading on the USB5V and RCBL pins
V
OUT
will degrade the load step transient performance of the
regulator. If I
is too high, the RCBL pin will go into
USB5V
current limit and the cable drop compensation feature
V
LOAD
will not work.
Capacitanceacrosstheremoteloadtogrounddownstream
0
0.5
1
1.5
2
2.5
3
of R
forms a zero in the LT8697’s feedback loop
SENSE
LOAD CURRENT (A)
due to cable drop compensation. C
reduces the cable
8697 F01
CDC
drop compensation gain at high frequency. The 1nF C
CDC
ꢁigure 1. Cable Drop Compensation Load Line
capacitor tied across the 10k R
is required for stability
CDC
8697p
12
For more information www.linear.com/LT8697
LINEAR_DIMENSIONS [ Linear Dimensions ]
