LTC3607
operaTion
The LTC3607 uses a constant-frequency, peak current
mode architecture. The operating frequency is set at
2.25MHzandcanbesynchronizedtoanexternaloscillator
between 1MHz and 4MHz. Both channels share the same
clock and run in-phase. To suit a variety of applications,
the selectable MODE/SYNC pin allows the user to trade-
off ripple for efficiency.
Low Current Operation
Two discontinuous-conduction modes (DCMs) are avail-
able to control the operation of the LTC3607 at low output
currents. Both modes, Burst Mode operation and pulse-
skipping, automaticallyswitchfromcontinuousoperation
to the selected mode when the load current is low.
To optimize efficiency, Burst Mode operation can be se-
lected by floating the MODE/SYNC pin or setting it to 1V
or greater. When the load is relatively light, the LTC3607
automaticallyswitchesintoBurstModeoperationinwhich
the PMOS switch operates intermittently based on load
demand with a fixed peak inductor current. By running
cycles periodically, the switching losses, which are domi-
nated by the gate charge losses of the power MOSFETs,
are minimized. The main control loop is interrupted when
the output voltage reaches the desired regulated value.
A voltage comparator trips when the ITH voltage drops
below an internal clamp voltage, shutting off the switch
and reducing the power. The output capacitor and the
inductor supply the power to the load until ITH exceeds
an internal clamp voltage, turning on the switch and the
main control loop, which starts another cycle.
The output voltage is set by an external divider returned
to the V pins. An error amplifier compares the divided
FB
output voltage with a reference voltage of 0.6V and ad-
justs the peak inductor current accordingly. Overvoltage
and undervoltage comparators will pull the independent
PGOOD outputs low if the output voltage is not within
8.5%. The PGOOD outputs will go high 64 clock cycles
after achieving regulation and will go low 64 cycles after
falling out of regulation.
Whether in Burst Mode or pulse-skipping operation, the
overvoltageprotectioncircuitisstillenabledwhentherest
of the regulator is asleep. Hence, if V
rises above the
OUT
overvoltage threshold, the regulator is forced out of sleep.
Main Control Loop
Duringnormaloperation,thetoppowerswitch(P-channel
MOSFET) is turned on at the beginning of a clock cycle
To optimize ripple, pulse-skipping mode can be selected
by grounding the MODE/SYNC pin. In the LTC3607, pulse-
skipping mode is implemented similarly to Burst Mode
operation with the ITH clamp set to a lower internal clamp
voltage. This results in lower ripple than in Burst Mode
operationwiththetrade-offbeingslightlylowerefficiency.
when the V voltage is below the reference voltage. The
FB
current into the inductor and the load increases until the
current limit is reached. The switch turns off and energy
stored in the inductor flows through the bottom switch
(N-channelMOSFET)intotheloaduntilthenextclockcycle.
The peak inductor current is controlled by the internally
compensated ITH voltage, which is the output of the error
Dropout Operation
Whentheinputsupplyvoltagedecreasestowardtheoutput
voltage, the duty cycle increases to 100% which is the
dropout condition. In dropout, the PMOS switch is turned
on continuously with the output voltage being equal to the
input voltage minus the voltage drops across the internal
P-channel MOSFET and the inductor.
amplifier. This amplifier compares the V pin to the 0.6V
FB
internal reference. When the load current increases, the
V
voltage decreases slightly below the reference. This
FB
decrease causes the error amplifier to increase the ITH
voltage until the average inductor current matches the
new load current.
The main control loop is shut down by pulling the RUN
pin to ground.
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For more information www.linear.com/LTC3607
Linear Systems [ Linear Systems ]
