LTC1857/LTC1858/LTC1859
W U
W
TI I G DIAGRA S
t (CONVST to BUSY Delay)
2
t
2
2.4V
t
(For Short Pulse Mode)
CONVST
BUSY
1
t
1
50%
50%
CONVST
0.4V
1859 TD02
1859 TD01
t (Delay Time, SCK↓ to SDO Valid)
6
t (Time from Previous Data Remains Valid After SCK↓)
7
t
6
7
t
t , t , t (SCK Timing)
3
4 5
SCK
SDO
0.4V
t
t
5
4
SCK
2.4V
0.4V
1859 TD03
t
3
1859 TD04
t (RD↓ to SCK Setup Time)
9
t (SDO Valid After RD↓)
8
t
8
t
9
RD
0.4V
RD
0.4V
Hi-Z
2.4V
2.4V
0.4V
SCK
SDO
1959 TD06
1859 TD05
t
(SDI Setup Time Before SCK↑)
t
11
(SDI Hold Time After SCK↑)
10
t
t
11
10
2.4V
2.4V
SCK
SDI
SCK
SDI
2.4V
0.4V
2.4V
0.4V
1859 TD07
1859 TD08
t
(SDO Valid Before BUSY↑, RD = 0)
t
(BUS Relinquish Time)
13
12
13
t
t
12
2.4V
2.4V
BUSY
SDO
RD
90%
10%
Hi-Z
2.4V
B15
SDO
1859 TD10
1859 TD09
185789f
9
Linear Systems [ Linear Systems ]
