LTC1857/LTC1858/LTC1859
U
U
U
PI FU CTIO S
DGND (Pin 24): Digital Ground.
SDI (Pin 25): Serial Data Input.
SCK (Pin 26): Serial Data Clock.
RD(Pin27):ReadInput. Thisactivelowsignalenablesthe
digital output pin SDO.
CONVST (Pin 28): Conversion Start. This active high
signal starts a conversion on its rising edge.
U
U
W
FU CTIO AL BLOCK DIAGRA
DV
AV
DD
DD
MUX ADDRESS AND RANGE
CONVST
CH0
CH1
CONTROL
LOGIC
SDI
INTERNAL
CLOCK
BUSY
INPUT MUX
•
•
•
AND
RANGE
SELECT
SCK
RD
+
12-/14-/16-BIT
SAMPLING ADC
CH7
DATA OUT
SERIAL I/O
OV
DD
COM
–
SDO
4.096V
2.5V
REFERENCE
1.6384X
8k
–
+
+
–
1859 BD
MUXOUT
AGND1
MUXOUT
ADC
ADC
V
REFCOMP
AGND2 AGND3 DGND
REF
TEST CIRCUITS
Load Circuits for Access Timing
Load Circuits for Output Float Delay
5V
5V
1k
1k
DN
DN
DN
DN
1k
1k
25pF
25pF
25pF
25pF
(A) Hi-Z TO V AND V TO V
OH OL
(B) Hi-Z TO V AND V TO V
OL OH
(A) V TO Hi-Z
OH
(B) V TO Hi-Z
OL
OH
OL
1859 TC01
1859 TC02
185789f
8
Linear Systems [ Linear Systems ]
