LTC3703
applicaTions inForMaTion
D2
ZHCS400
L2
10µH
V
IN
V
IN
+
C10
1µF
16V
C9
4.7µF
6.3V
1µF
R17
1M
V
SW
IN
1%
+
LT1613
C
IN
SHDN
FB
12V
+
R17
110k
1%
C
IN
GND
V
IN
V
IN
LTC3703
LTC3703
12V
TG
SW
BG
TG
SW
BG
L1
L1
V
OUT
V
OUT
<10V
10V TO
15V
V
CC
V
CC
+
C
DRV
CC
+
DRV
CC
OUT
C
OUT
BGRTN
BGRTN
3703 F10b
3703 F10a
Figure 10a. VCC Generated from 10V < VOUT < 15V
Figure 10b. VCC Generated from VOUT < 10V
V
(<40V)
IN
V
IN
+
1µF
+
C
IN
+
C
IN
OPTIONAL V
CC
CONNECTION
10V < V < 15V
SEC
12V
12V
0.22µF
BAT85
BAT85
V
IN
V
IN
LTC3703
V
LTC3703
SEC
+
+
V
TG1
SW
CC
1µF
BAT85
TG
SW
BG
VN2222LL
N
1
T1
V
DRV
FCB
OUT
CC
V
OUT
V
CC
L1
R1
R2
+
C
OUT
BG1
C
DRV
CC
OUT
GND
BGRTN
BGRTN
3703 F10c
3703 F10d
Figure 10c. Secondary Output Loop and VCC Connection
Figure 10d. Capacitive Charge Pump for VCC (VIN < 40V)
above the input supply: VBOOST = VIN + VDRVCC. The value
of the boost capacitor, CB, needs to be 100 times that
of the total input capacitance of the topside MOSFET(s).
The reverse breakdown of the external diode, DB, must be
greater than VIN(MAX). Another important consideration
for the external diode is the reverse recovery and reverse
leakage, either of which may cause excessive reverse cur-
rent to flow at full reverse voltage. If the reverse current
times reverse voltage exceeds the maximum allowable
power dissipation, the diode may be damaged. For best
results, use an ultrafast recovery silicon diode such as
the BAS19.
Aninternalundervoltagelockout(UVLO)monitorsthevolt-
age on DRV to ensure that the LTC3703 has sufficient
CC
gate drive voltage. If the DRV voltage falls below the
CC
UVLO threshold, the LTC3703 shuts down and the gate
drive outputs remain low.
3703fc
17
Linear Systems [ Linear Systems ]
