LTC3703
applicaTions inForMaTion
breakdown specification. Since many high voltage MOS-
When the controller is operating in continuous mode the
duty cycles for the top and bottom MOSFETs are given by:
FETs have higher threshold voltages (typically, V
GS(MIN)
≥ 6V), the LTC3703 is designed to be used with a 9V to
VOUT
Main Switch Duty Cycle=
15V gate drive supply (DRV pin).
CC
V
IN
For maximum efficiency, on-resistance R
capacitanceshouldbeminimized. LowR
and input
DS(ON)
V – V
IN
OUT
minimizes
Synchronous Switch Duty Cycle=
DS(ON)
V
IN
conduction losses and low input capacitance minimizes
transition losses. MOSFET input capacitance is a combi-
nation of several components but can be taken from the
typical “gate charge” curve included on most data sheets
(Figure 9).
The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
VOUT
PMAIN
=
I
(
2 (1+ δ)RDS(ON)
+
MAX
)
V
V
IN
IN
I
V2 MAX (RDR)(CMILLER)•
MILLER EFFECT
V
V
GS
IN
2
a
b
+
–
V
1
1
DS
+
+
(f)
Q
V
IN
GS
V – VTH(IL) VTH(IL)
–
C
= (Q – Q )/V
DS
CC
MILLER
B
A
3703 F09
V − V
PSYNC
=
OUT (IMAX)2(1+ δ)RDS(0N)
IN
Figure 9. Gate Charge Characteristic
V
IN
The curve is generated by forcing a constant input cur-
rent into the gate of a common source, current source
loaded stage and then plotting the gate voltage versus
time. The initial slope is the effect of the gate-to-source
and the gate-to-drain capacitance. The flat portion of the
curve is the result of the Miller multiplication effect of the
drain-to-gate capacitance as the drain drops the voltage
across the current source load. The upper sloping line is
due to the drain-to-gate accumulation capacitance and
the gate-to-source capacitance. The Miller charge (the
increase in coulombs on the horizontal axis from a to b
where δ is the temperature dependency of R
, R
DS(ON) DR
is the effective top driver resistance (approximately 2Ω at
= V ), V is the drain potential and the change
V
GS
MILLER
IN
in drain potential in the particular application. V
is
TH(IL)
the data sheet specified typical gate threshold voltage
specified in the power MOSFET data sheet at the specified
drain current. C
is the calculated capacitance using
MILLER
the gate charge curve from the MOSFET data sheet and
the technique described above.
2
BothMOSFETshaveI RlosseswhilethetopsideN-channel
while the curve is flat) is specified for a given V drain
DS
equation includes an additional term for transition losses,
voltage, but can be adjusted for different V voltages by
DS
which peak at the highest input voltage. For V < 25V,
IN
multiplying by the ratio of the application V to the curve
DS
the high current efficiency generally improves with larger
specified V values. A way to estimate the C
term
DS
MILLER
MOSFETs, whileforV >25V, thetransitionlossesrapidly
IN
is to take the change in gate charge from points a and b
increasetothepointthattheuseofahigherR
device
DS(ON)
on a manufacturers data sheet and divide by the stated
withlowerC
actuallyprovideshigherefficiency.The
MILLER
V
DS
voltage specified. C
is the most important se-
MILLER
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short circuit when the synchronous switch is on close
to 100% of the period.
lection criteria for determining the transition loss term in
the top MOSFET but is not directly specified on MOSFET
data sheets. C
and C are specified sometimes but
RSS
OS
definitions of these parameters are not included.
3703fc
14
Linear Systems [ Linear Systems ]
