LTC3261
APPLICATIONS INFORMATION
should be consulted to ensure the desired capacitance at
all temperatures and voltages. Table 1 is a list of ceramic
capacitor manufacturers and their websites.
The power dissipated in the LTC3261 is:
P = (V – |V |) • (I
)
D
IN
OUT
OUT
where I
denotes output current at the V
pin.
OUT
OUT
Table 1
ThederatingcurveinFigure4assumesamaximumthermal
AVX
Kemet
www.avxcorp.com
www.kemet.com
resistance, θ , of 40°C/W for the package. This can be
JA
achieved from a printed circuit board layout with a solid
ground plane and a good connection to the exposed pad
of the LTC3261 package.
Murata
Taiyo Yuden
Vishay
www.murata.com
www.t-yuden.com
www.vishay.com
It is recommended that the LTC3261 be operated in the
TDK
www.component.tdk.com
region corresponding to T ≤ 150°C for continuous opera-
J
Layout Considerations
tion as shown in Figure 4. Short-term operation may be
acceptablefor150°C<T <175°Cbutlong-termoperation
Duetohighswitchingfrequencyandhightransientcurrents
produced by LTC3261, careful board layout is necessary
for optimum performance. A true ground plane and short
connections to all the external capacitors will improve
performanceandensureproperregulationunderallcondi-
tions. Figure 3 shows an example layout for the LTC3261.
J
in this region should be avoided as it may reduce the life of
the part or cause degraded performance. For T > 175°C
J
the part will be in thermal shutdown.
GND
+
–
C
The flying capacitor nodes C and C switch large currents
at a high frequency. These nodes should not be routed
close to sensitive pins such as the RT pin .
FLY
V
V
OUT
IN
Thermal Management
EN
MODE
R
T
At high input voltages and maximum output current, there
can be substantial power dissipation in the LTC3261. If
the junction temperature increases above approximately
175°C, the thermal shutdown circuitry will automatically
deactivate the output. To reduce the maximum junction
temperature, a good thermal connection to the PC board
groundplaneisrecommended.Connectingtheexposedpad
of the package to a ground plane under the device on two
layers of the PC board can reduce the thermal resistance
of the package and PC board considerably.
GND
3261 F03
Figure 3. Recommended Layout
6
5
4
3
2
1
0
θ
JA
= 40°C/W
THERMAL
SHUTDOWN
T = 175°C
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Derating Power at High Temperatures
RECOMMENDED
OPERATION
To prevent an overtemperature condition in high power
applications, Figure 4 should be used to determine the
maximumcombinationofambienttemperatureandpower
dissipation.
T = 150°C
J
–50 –25
0
25 50 75 100 125 150 175
AMBIENT TEMPERATURE (°C)
3261 F04
The power dissipated in the LTC3261 should always fall
under the line shown for a given ambient temperature.
Figure 4. Maximum Power Dissipation vs Ambient Temperature
3261f
9
Linear Systems [ Linear Systems ]
