LTC3261
PIN FUNCTIONS
NC (Pins 1, 3, 6, 7,12): No Connect Pins. These pins are
not connected to the LTC3261 die. These pins should be
left floating or connected to ground. Pins 6 and 7 can also
be shorted to adjacent pins.
V (Pin9):InputVoltagefortheChargePump. V should
IN IN
be bypassed with a low impedance ceramic capacitor.
EN (Pin 10): Logic Input. A logic “high” on the EN pin
enables the inverting charge pump.
RT(Pin2):InputConnectionforProgrammingtheSwitch-
ing Frequency. The RT pin servos to a fixed 1.2V when
the EN pin is driven to a logic “high”. A resistor from RT
to GND sets the charge pump switching frequency. If the
RT pin is tied to GND, the switching frequency defaults
to a fixed 500kHz.
MODE (Pin 12): Logic Input. The MODE pin deter-
mines the charge pump operating mode. A logic “high”
on the MODE pin forces the charge pump into Burst
Mode operation regulating V
to approximately
OUT
–0.94 • V with hysteretic control. A logic “low” on the
IN
MODE pin forces the charge pump to operate as an open-
loop inverter with a constant switching frequency. The
switching frequency in both modes is determined by an
external resistor from the RT pin to GND. In Burst Mode,
this represents the frequency of the burst cycles before
the part enters the low quiescent current sleep state.
V
(Pin 4): Charge Pump Output Voltage. In constant
OUT
frequency mode (MODE = low) this pin is driven to –V .
IN
InBurstModeoperation, (MODE=high)thispinvoltageis
regulatedto–0.94•V usinganinternalburstcomparator
IN
with hysteretic control.
–
C (Pin 5): Flying Capacitor Negative Connection.
GND (Exposed Pad Pin 13): Ground. The exposed pack-
age pad is ground and must be soldered to the PC board
groundplaneforproperfunctionalityandforratedthermal
performance.
+
C (Pin 8): Flying Capacitor Positive Connection.
BLOCK DIAGRAM
8
5
+
–
C
C
S1
S4
V
V
OUT
IN
9
4
S3
S2
EN
CHARGE
PUMP
AND
INPUT
LOGIC
10
11
50kHz
TO
500kHz
OSC
RT
2
MODE
GND
13
3261 BD
3261f
6
Linear Systems [ Linear Systems ]
