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AXA016A0X3-SR12Z 参数 Datasheet PDF下载

AXA016A0X3-SR12Z图片预览
型号: AXA016A0X3-SR12Z
PDF下载: 下载PDF文件 查看货源
内容描述: 10 - 14VDC输入; 0.75Vdc至5.5VDC输出; 16A的输出电流 [10 - 14Vdc input; 0.75Vdc to 5.5Vdc Output; 16A output current]
分类和应用:
文件页数/大小: 21 页 / 688 K
品牌: LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
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Data Sheet  
Austin SuperLynxTM 12V SMT Non-isolated Power Modules:  
10 – 14Vdc input; 0.75Vdc to 5.5Vdc Output; 16A output current  
April 8, 2008  
Test Configurations  
Design Considerations  
Input Filtering  
CURRENT PROBE  
TO OSCILLOSCOPE  
The Austin SuperLynxTM 12V SMT module should be  
connected to a low-impedance source. A highly inductive  
LTEST  
VIN(+)  
1μH  
source can affect the stability of the module. An input  
capacitance must be placed directly adjacent to the input  
pin of the module, to minimize input ripple voltage and  
CIN  
CS 1000μF  
Electrolytic  
ensure module stability.  
2x100μF  
Tantalum  
E.S.R.<0.1Ω  
@ 20°C 100kHz  
In a typical application, 6x47 µF low-ESR tantalum  
capacitors (AVX part #: TPSE476M025R0100, 47µF 25V  
100 mESR tantalum capacitor) will be sufficient to  
provide adequate ripple voltage at the input of the  
module. To further minimize ripple voltage at the input,  
very low ESR ceramic capacitors are recommended at  
the input of the module. Figure 26 shows input ripple  
voltage (mVp-p) for various outputs with 6x47 µF  
tantalum capacitors and with 6x22 µF ceramic capacitor  
COM  
NOTE: Measure input reflected ripple current with a simulated  
source inductance (LTEST) of 1μH. Capacitor CS offsets  
possible battery impedance. Measure current as shown  
above.  
Figure 23. Input Reflected Ripple Current Test Setup.  
COPPER STRIP  
(TDK part #: C4532X5R1C226M) at full load.  
.
VO(+)  
COM  
RESISTIVE  
LOAD  
350  
1uF  
.
10uF  
SCOPE  
300  
250  
200  
150  
10 0  
50  
GROUND PLANE  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
Figure 24. Output Ripple and Noise Test Setup.  
Tantalum  
Ceramic  
5
Rdistribution Rcontact  
Rcontact Rdistribution  
0
VIN(+)  
VO  
0
1
2
3
4
6
Output Voltage (Vdc)  
RLOAD  
VO  
VIN  
Figure 26. Input ripple voltage for various output  
with 6x47 µF tantalum capacitors and with 6x22 µF  
ceramic capacitors at the input (full load).  
Rdistribution Rcontact  
Rcontact Rdistribution  
COM  
COM  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
Figure 25. Output Voltage and Efficiency Test Setup.  
VO. IO  
Efficiency  
=
x
100 %  
η
VIN. IIN  
LINEAGE POWER  
10