Data Sheet
Austin LynxTM II SIP Non-isolated Power Modules:
March 12, 2009
2.4 – 5.5Vdc input; 0.75Vdc to 3.63Vdc Output; 10A output current
Test Configurations
Design Considerations
Input Filtering
CURRENT PROBE
TO OSCILLOSCOPE
Austin LynxTM II SIP module should be connected to a
low-impedance source. A highly inductive source can
LTEST
VIN(+)
1μH
affect the stability of the module. An input capacitance
must be placed directly adjacent to the input pin of the
module, to minimize input ripple voltage and ensure
module stability.
CIN
CS 1000μF
Electrolytic
2x100μF
Tantalum
E.S.R.<0.1Ω
@ 20°C 100kHz
To minimize input voltage ripple, low-ESR polymer and
COM
ceramic capacitors are recommended at the input of the
module. Figure 27 shows input ripple voltage (mVp-p)
for various outputs with 1x150 µF polymer capacitors
(Panasonic p/n: EEFUE0J151R, Sanyo p/n:
NOTE: Measure input reflected ripple current with a simulated
source inductance (LTEST) of 1μH. Capacitor CS offsets
possible battery impedance. Measure current as shown
above.
6TPE150M) in parallel with 1 x 47 µF ceramic capacitor
(Panasonic p/n: ECJ-5YB0J476M, Taiyo- Yuden p/n:
CEJMK432BJ476MMT) at full load. Figure 28 shows
the input ripple with 3x150 µF polymer capacitors in
parallel with 2 x 47 µF ceramic capacitor at full load.
Figure 24. Input Reflected Ripple Current Test
Setup.
COPPER STRIP
80
VO(+)
COM
RESISTIVE
LOAD
3.3Vin
70
5Vin
1uF
.
10uF
SCOPE
60
50
40
30
20
10
GROUND PLANE
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Figure 25. Output Ripple and Noise Test Setup.
0
0
0.5
1
1.5
2
2.5
3
3.5
Rdistribution Rcontact
Rcontact Rdistribution
VIN(+)
VO
Output Voltage (Vdc)
Figure 27. Input ripple voltage for various output
with 1x150 µF polymer and 1x47 µF ceramic
capacitors at the input (full load)
RLOAD
VO
VIN
80
Rdistribution Rcontact
Rcontact Rdistribution
3.3Vin
COM
COM
70
5Vin
60
50
40
30
20
10
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Figure 26. Output Voltage and Efficiency Test Setup.
VO. IO
Efficiency
=
x
100 %
η
0
VIN. IIN
0
0.5
1
1.5
2
2.5
3
3.5
Output Voltage (Vdc)
Figure 28. Input ripple voltage for various output
with 3x150 µF polymer and 2x47 µF ceramic
capacitors at the input (full load)
LINEAGE POWER
10
LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
