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ATA010A0X3-SRZ 参数 Datasheet PDF下载

ATA010A0X3-SRZ图片预览
型号: ATA010A0X3-SRZ
PDF下载: 下载PDF文件 查看货源
内容描述: 8.3 - 14.0 VDC输入; 0.75Vdc至5.5VDC输出; 10A的输出电流 [8.3 - 14.0 Vdc Input; 0.75Vdc to 5.5Vdc Output; 10A output current]
分类和应用:
文件页数/大小: 21 页 / 700 K
品牌: LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
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Data Sheet  
Austin LynxTM II 12 V SMT Non-Isolated Power Modules:  
May 19, 2009  
8.3 – 14.0Vdc Input; 0.75Vdc to 5.5Vdc Output; 10A output current  
Test Configurations  
Design Considerations  
Input Filtering  
CURRENT PROBE  
TO OSCILLOSCOPE  
Austin LynxTM II 12V SMT module should be connected to  
a low-impedance AC source. A highly inductive source  
LTEST  
VIN(+)  
1μH  
can affect the stability of the module. An input  
capacitance must be placed directly adjacent to the input  
pin of the module, to minimize input ripple voltage and  
ensure module stability.  
CIN  
CS 1000μF  
Electrolytic  
2x100μF  
Tantalum  
E.S.R.<0.1Ω  
@ 20°C 100kHz  
In a typical application, 4x47 µF low-ESR tantalum  
COM  
capacitors (AVX part #: TPSE476M025R0100, 47µF 25V  
100 mESR tantalum capacitor) will be sufficient to  
NOTE: Measure input reflected ripple current with a simulated  
source inductance (LTEST) of 1μH. Capacitor CS offsets  
possible battery impedance. Measure current as shown  
above.  
provide adequate ripple voltage at the input of the  
module. To minimize ripple voltage at the input, low  
ESR ceramic capacitors are recommended at the input of  
the module. Figure 26 shows input ripple voltage (mVp-  
p) for various outputs with 4x47 µF tantalum capacitors  
and with 4x22 µF ceramic capacitor (TDK part #:  
C4532X5R1C226M) at full load.  
Figure 23. Input Reflected Ripple Current Test Setup.  
COPPER STRIP  
VO(+)  
COM  
RESISTIVE  
LOAD  
300  
250  
200  
150  
1uF  
.
10uF  
SCOPE  
GROUND PLANE  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
10 0  
Tantalum  
50  
Figure 24. Output Ripple and Noise Test Setup.  
Ceramic  
0
0
1
2
3
4
5
6
Rdistribution Rcontact  
Rcontact Rdistribution  
VIN(+)  
VO  
Output Voltage (Vdc)  
Figure 26. Input ripple voltage for various output  
with 4x22 µF polymer and 4x47 µF ceramic capacitors  
at the input (full load).  
RLOAD  
VO  
VIN  
Rdistribution Rcontact  
Rcontact Rdistribution  
COM  
COM  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
Figure 25. Output Voltage and Efficiency Test Setup.  
VO. IO  
Efficiency  
=
x
100 %  
η
VIN. IIN  
LINEAGE POWER  
10