Preliminary Data Sheet
October 28, 2010
9-36V ProLynxTM 5A: Non-isolated DC-DC Power Modules
9 – 36Vdc input; 3Vdc to 18Vdc output; 5A to 2.5A output current
Test Configurations
Design Considerations
Input Filtering
CURRENT PROBE
TO OSCILLOSCOPE
The 9-36V ProLynxTM module should be connected to
a low ac-impedance source. A highly inductive
source can affect the stability of the module. An input
LTEST
VIN(+)
1μH
capacitance must be placed directly adjacent to the
input pin of the module, to minimize input ripple
voltage and ensure module stability.
CIN
CS 1000μF
Electrolytic
2x100μF
Tantalum
E.S.R.<0.1Ω
To minimize input voltage ripple, ceramic capacitors
are recommended at the input of the module. Figure
28 shows the input ripple voltage for various output
voltages at maximum load current with 2x10 µF or
3x10 µF ceramic capacitors and an input of 12V,
while Fig. 29 shows the input ripple for an input
voltage of 28V.
@ 20°C 100kHz
COM
NOTE: Measure input reflected ripple current with a simulated
source inductance (LTEST) of 1μH. Capacitor CS offsets
possible battery impedance. Measure current as shown
above.
Figure 25. Input Reflected Ripple Current Test
Setup.
250
225
200
175
150
COPPER STRIP
RESISTIVE
Vo+
LOAD
10uF
0.1uF
COM
2x10uF
125
SCOPE USING
BNC SOCKET
3x10uF
100
GROUND PLANE
3
4
5
6
7
8
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Output Voltage (Vdc)
Figure 28. Input ripple voltage for various output
voltages with 2x10 µF or 3x10 µF ceramic
capacitors at the input (maximum load). Input
voltage is 12V.
Figure 26. Output Ripple and Noise Test Setup.
Rdistribution Rcontact
Rcontact Rdistribution
VIN(+)
VO
275
250
225
200
175
150
RLOAD
VO
VIN
Rdistribution Rcontact
Rcontact Rdistribution
COM
COM
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
2x10uF
125
3x10uF
100
Figure 27. Output Voltage and Efficiency Test Setup.
3
5
7
9
11
13
15
17
VO. IO
Output Voltage (Vdc)
Efficiency
=
x
100 %
η
VIN. IIN
Figure 29. Input ripple voltage for various output
voltages with 2x10 µF or 3x10 µF ceramic
capacitors at the input (maximum load). Input
voltage is 28V.
LINEAGE POWER
10