Data Sheet
12V TLynxTM: Non-isolated DC-DC Power Modules
July 24, 2009
4.5 – 14Vdc input; 0.69Vdc to 5.5Vdc output; 20A output current
Sense is being used, the voltage between S+ and S–
cannot be more than 0.5V larger than the voltage
between VOUT and GND. Note that the output voltage
of the module cannot exceed the specified maximum
value. When the Remote Sense feature is not being
used, connect the S+ pin to the VOUT pin and the S–
pin to the GND pin.
The 12V TLynxTM modules have monotonic start-up
and shutdown behavior for any combination of rated
input voltage, output current and operating
temperature range.
Startup into Pre-biased Output
The 12V Pico TLynxTM 20A modules can start into a
prebiased output as long as the prebias voltage is 0.5V
less than the set output voltage. Note that prebias
operation is not supported when output voltage
sequencing is used.
VIN(+)
VO(+)
S+
ON/OFF
Output Voltage Sequencing
LOAD
TRIM
The 12V TLynxTM modules include a sequencing
feature, EZ-SEQUENCE that enables users to
implement various types of output voltage sequencing
in their applications. This is accomplished via an
additional sequencing pin. When not using the
sequencing feature, either tie the SEQ pin to VIN or
leave it unconnected.
Rtri m
GND
Figure 45. Circuit configuration for programming
output voltage using an external resistor.
When an analog voltage is applied to the SEQ pin, the
output voltage tracks this voltage until the output
reaches the set-point voltage. The final value of the
SEQ voltage must be set higher than the set-point
voltage of the module. The output voltage follows the
voltage on the SEQ pin on a one-to-one volt basis. By
connecting multiple modules together, multiple
modules can track their output voltages to the voltage
applied on the SEQ pin.
Voltage Margining
Output voltage margining can be implemented in the
12V TLynxTM modules by connecting a resistor, Rmargin-
up, from the Trim pin to the ground pin for margining-up
the output voltage and by connecting a resistor, Rmargin-
down, from the Trim pin to output pin for margining-
down. Figure 46 shows the circuit configuration for
output voltage margining. The POL Programming
Tool, available at www.lineagepower.com under the
Design Tools section, also calculates the values of
For proper voltage sequencing, first, input voltage is
applied to the module. The On/Off pin of the module is
left unconnected (or tied to GND for negative logic
modules or tied to VIN for positive logic modules) so
that the module is ON by default. After applying input
voltage to the module, a minimum 10msec delay is
required before applying voltage on the SEQ pin.
During this time, a voltage of 50mV (± 20 mV) is
maintained on the SEQ pin. This delay gives the
module enough time to complete its internal power-up
soft-start cycle. During the delay time, the SEQ pin
should be held close to ground (nominally 50mV ± 20
mV). This is required to keep the internal op-amp out
of saturation thus preventing output overshoot during
the start of the sequencing ramp. By selecting resistor
R1 (see fig. 47) according to the following equation
R
margin-up and Rmargin-down for a specific output voltage
and % margin. Please consult your local Lineage
Power Technical Representative for additional details.
Vo
Rmargin-down
MODULE
Q2
Trim
Rmargin-up
Rtrim
24950
ohms,
R1 =
VIN − 0.05
Q1
the voltage at the sequencing pin will be 50mV when
the sequencing signal is at zero.
GND
Figure 46. Circuit Configuration for margining
Output voltage
Monotonic Start-up and Shutdown
LINEAGE POWER
16
LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
