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APTS020A0X43-SRZ 参数 Datasheet PDF下载

APTS020A0X43-SRZ图片预览
型号: APTS020A0X43-SRZ
PDF下载: 下载PDF文件 查看货源
内容描述: 4.5 - 14VDC输入; 0.69Vdc至5.5VDC输出; 20A的输出电流 [4.5 - 14Vdc input; 0.69Vdc to 5.5Vdc output; 20A output current]
分类和应用:
文件页数/大小: 26 页 / 734 K
品牌: LINEAGEPOWER [ LINEAGE POWER CORPORATION ]
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Data Sheet  
12V TLynxTM: Non-isolated DC-DC Power Modules  
July 24, 2009  
4.5 – 14Vdc input; 0.69Vdc to 5.5Vdc output; 20A output current  
Test Configurations  
Design Considerations  
Input Filtering  
CURRENT PROBE  
TO OSCILLOSCOPE  
The 12V TLynxTM module should be connected to a  
low ac-impedance source. A highly inductive source  
LTEST  
VIN(+)  
1μH  
can affect the stability of the module. An input  
capacitance must be placed directly adjacent to the  
input pin of the module, to minimize input ripple  
voltage and ensure module stability.  
CIN  
CS 1000μF  
Electrolytic  
2x100μF  
Tantalum  
E.S.R.<0.1Ω  
To minimize input voltage ripple, low-ESR polymer  
and ceramic capacitors are recommended at the input  
of the module.  
@ 20°C 100kHz  
COM  
NOTE: Measure input reflected ripple current with a simulated  
source inductance (LTEST) of 1μH. Capacitor CS offsets  
possible battery impedance. Measure current as shown  
above.  
To minimize input voltage ripple, ceramic capacitors  
are recommended at the input of the module. Figure  
40 shows the input ripple voltage for various output  
voltages at 20A of load current with 2x22 µF or 3x22  
µF ceramic capacitors and an input of 12V.  
Figure 37. Input Reflected Ripple Current Test  
Setup.  
300  
COPPER STRIP  
2x22uF  
250  
3x22 uF  
RESISTIVE  
Vo+  
LOAD  
200  
10uF  
0.1uF  
150  
100  
50  
COM  
SCOPE USING  
BNC SOCKET  
GROUND PLANE  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
Output Voltage (Vdc)  
Figure 40. Input ripple voltage for various  
Figure 38. Output Ripple and Noise Test Setup.  
output voltages with 2x22 µF or 3x22 µF ceramic  
capacitors at the input (20A load). Input voltage  
is 12V.  
Rdistribution Rcontact  
Rcontact Rdistribution  
VIN(+)  
VO  
Output Filtering  
The 12V TLynxTM modules are designed for low output  
ripple voltage and will meet the maximum output ripple  
specification with 0.1 µF ceramic and 10 µF ceramic  
capacitors at the output of the module. However,  
additional output filtering may be required by the  
system designer for a number of reasons. First, there  
may be a need to further reduce the output ripple and  
noise of the module. Second, the dynamic response  
characteristics may need to be customized to a  
particular load step change.  
RLOAD  
VO  
VIN  
Rdistribution Rcontact  
Rcontact Rdistribution  
COM  
COM  
NOTE: All voltage measurements to be taken at the module  
terminals, as shown above. If sockets are used then  
Kelvin connections are required at the module terminals  
to avoid measurement errors due to socket contact  
resistance.  
Figure 39. Output Voltage and Efficiency Test  
Setup.  
To reduce the output ripple and improve the dynamic  
response to a step load change, additional  
capacitance at the output can be used. Low ESR  
polymer and ceramic capacitors are recommended to  
improve the dynamic response of the module. Figure  
41 provides output ripple information for different  
VO. IO  
Efficiency  
=
x
100 %  
η
VIN. IIN  
LINEAGE POWER  
13  
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