LM230WF5
Liquid Crystal Display
Product Specification
Table 6. Required signal assignment for Flat Link(NS:DS90CF383) transmitter
Pin # Pin Name
Require Signal
Power Supply for TTL Input
TTL Input (R7)
Pin #
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Pin Name
GND
Require Signal
Ground pin for TTL
TTL Input (DE)
1
VCC
D5
2
D26
3
D6
TTL Input (R5)
TX CLKIN
PWR DWN
PLL GND
PLL VCC
PLL GND
LVDS GND
TxOUT3+
TxOUT3-
TX CLKOUT+
TX CLKOUT-
TX OUT2+
TX OUT2-
LVDS GND
LVDS VCC
TX OUT1+
TX OUT1-
TX OUT0+
TX OUT0-
LVDS GND
D27
TTL Level clock Input
4
D7
TTL Input (G0)
Power Down Input
5
GND
D8
Ground pin for TTL
TTL Input (G1)
Ground pin for PLL
6
Power Supply for PLL
7
D9
TTL Input (G2)
Ground pin for PLL
8
D10
VCC
D11
D12
D13
GND
D14
D15
D16
VCC
D17
D18
D19
GND
D20
D21
D22
D23
VCC
D24
D25
TTL Input (G6)
Ground pin for LVDS
9
Power Supply for TTL Input
TTL Input (G7)
Positive LVDS differential data output 3
Negative LVDS differential data output 3
Positive LVDS differential clock output
Negative LVDS differential clock output
Positive LVDS differential data output 2
Negative LVDS differential data output 2
Ground pin for LVDS
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
TTL Input (G3)
TTL Input (G4)
Ground pin for TTL
TTL Input (G5)
TTL Input (B0)
TTL Input (B6)
Power Supply for LVDS
Power Supply for TTL Input
TTL Input (B7)
Positive LVDS differential data output 1
Negative LVDS differential data output 1
Positive LVDS differential data output 0
Negative LVDS differential data output 0
Ground pin for LVDS
TTL Input (B1)
TTL Input (B2)
Ground pin for TTL Input
TTL Input (B3)
TTL Input (R6)
TTL Input (B4)
D0
TTL Input (R0)
TTL Input (B5)
D1
TTL Input (R1)
TTL Input (RSVD)
Power Supply for TTL Input
TTL Input (HSYNC)
TTL Input (VSYNC)
GND
Ground pin for TTL
D2
TTL Input (R2)
D3
TTL Input (R3)
D4
TTL Input (R4)
Notes : 1. Refer to LVDS Transmitter Data Sheet for detail descriptions.
2. 7 means MSB and 0 means LSB at R,G,B pixel data
Ver. 0.0
Feb. 16, 2012
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