LM170E01
Liquid Crystal Display
Product Specification
Table 4. Required signal assignment for Flat Link (TI:SN75LVDS83) Transmitter
Pin
Pin
Pin Name
VCC
D5
Require Signal
Pin Name
Require Signal
Ground pin for TTL
Power Supply for TTL Input
TTL Input(R7)
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
1
2
3
4
5
6
7
8
GND
D26
TTL Input(DE)
TTL Input(R5)
TTL Level clock Input
Power Down Input
Ground pin for PLL
D6
TxCLKIN
PWR DWN
PLL GND
PLL VCC
PLL GND
LVDS GND
TxOUT3+
TxOUT3-
TxCLKOUT+
TxCLKOUT-
TxOUT2+
TxOUT2-
LVDS GND
LVDS VCC
TxOUT1+
TxOUT1-
TxOUT0+
TxOUT0-
LVDS GND
D27
D7
TTL Input(G0)
Ground pin for TTL
TTL Input(G1)
GND
D8
Power Supply for PLL
D9
TTL Input(G2)
Ground pin for PLL
D10
VCC
D11
D12
D13
GND
D14
D15
D16
VCC
D17
D18
D19
GND
D20
D21
D22
D23
VCC
D24
D25
TTL Input(G6)
Ground pin for LVDS
9
Power Supply for TTL Input
TTL Input(G7)
Positive LVDS differential data output3
Negative LVDS differential data output3
Positive LVDS differential clock output
Negative LVDS differential clock output
Positive LVDS differential data output2
Negative LVDS differential data output2
Ground pin for LVDS
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
TTL Input(G3)
TTL Input(G4)
Ground pin for TTL
TTL Input(G5)
TTL Input(B0)
TTL Input(B6)
Power Supply for LVDS
Positive LVDS differential data output1
Negative LVDS differential data output1
Positive LVDS differential data output0
Negative LVDS differential data output0
Power Supply for TTL Input
TTL Input(B7)
TTL Input(B1)
TTL Input(B2)
Ground pin for TTL Input
TTL Input(B3)
Ground pin for TTL
TTL Input(R6)
D0
TTL Input(R0)
TTL Input(R1)
Ground pin for TTL
TTL Input(R2)
TTL Input(B4)
TTL Input(B5)
D1
GND
TTL Input(RSVD)
Power Supply for TTL Input
D2
D3
TTL Input(HSYNC)
TTL Input(VSYNC)
TTL Input(R3)
TTL Input(R4)
D4
Notes : 1. Refer to LVDS Transmitter Data Sheet for detail descriptions.
2. 7 means MSB and 0 means LSB at R,G,B pixel data
10 / 28
Ver 1.0
Mar. 28, 2005
LG [ LG SEMICON CO.,LTD. ]
