LC470EUF
Product Specification
3-3. Signal Timing Specifications
Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal
timings should be satisfied with the following specification for normal operation.
Table 6. TIMING TABLE (DE Only Mode)
ITEM
Symbol
Min
Typ
Max
Unit
Note
Display
Period
tHV
480
480
480
tCLK
1920 / 4
1
Horizontal
Blank
Total
tHB
tHP
40
70
200
680
tCLK
tCLK
520
550
Display
Period
tVV
tVB
tVP
1080
1080
1080
Lines
Lines
Lines
20
45
86
Vertical
Blank
Total
1
(228)
(270)
(300)
1100
1125
1166
(1308)
(1350)
(1380)
ITEM
Symbol
fCLK
Min
Typ
74.25
135
Max
78.00
140
Unit
MHz
KHz
Note
DCLK
66.97
121.8
Horizontal
fH
2
2
Frequency
NTSC :
108~122Hz
108
(95)
120
122
Vertical
fV
Hz
(100)
(104)
(PAL : 95~104Hz)
Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode).
If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin.
2. The performance of the electro-optical characteristics may be influenced by variance of the vertical
refresh rate and the horizontal frequency
※ Timing should be set based on clock frequency.
11 /40
Ver. 1.5
LG [ LG SEMICON CO.,LTD. ]
