LB121S03
Liquid Crystal Display
Product Specification
3-3. Signal Timing Specifications
This is the signal timing required at the input of the User connector. All of the interface signal timing should be
satisfied with the following specifications and specifications of LVDS Tx/Rx for its proper operation.
Table 5. TIMING TABLE
ITEM
DCLK
Hsync
Frequency
Period
Width
Vsync
Period
Width
Data
Enable
Horizontal back porch
Horizontal front porch
Vertical back porch
Vertical front porch
Symbol
f
CLK
t
HP
t
WH
t
VP
t
WV
t
HBP
t
HFP
t
VBP
t
VFP
Min
37.0
990
12
606
1
30
30
2
3
Typ
38.5
1024
64
625
6
88
72
15
4
Max
40.0
1100
Unit
MHz
t
CLK
Note
120
730
t
HP
24
120
t
CLK
80
22
t
HP
5
3-4. Signal Timing Waveforms
Condition : VCC =3.3V
High: 0.7VCC
Data Enable, Hsync, Vsync
Low: 0.3VCC
DCLK
t
CLK
0.5 Vcc
Hsync t
WH
t
HBP
Data Enable
t
HP
t
WHA
t
HFP
t
VP
t
WV
Vsync
t
VBP
t
WVA
t
VFP
Data Enable
Ver. 0.0
Feb. 27, 2006
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