Specifications ispGDX Family
Pin Configuration: ispGDX120A
ispGDX120A 160-Pin PQFP Pinout Diagram
Data
Control
Control
—
CLK
Data
NC1
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
1
2
3
4
5
6
7
8
—
—
VCC
I/O A 0
I/O A 1
I/O A 2
I/O A 3
GND
I/O A 4
I/O A 5
I/O A 6
I/O A 7
I/O A 8
I/O A 9
I/O A 10
I/O A 11
GND
GND
I/O D 1
I/O D 0
I/O C 29
I/O C 28
I/O C 27
I/O C 26
I/O C 25
I/O C 24
GND
I/O C 23
I/O C 22
I/O C 21
I/O C 20
VCC
I/O C 19
I/O C 18
I/O C 17
I/O C 16
GND
I/O C 15
I/O C 14
I/O C 13
I/O C 12
I/O C 11
I/O C 10
I/O C 9
I/O C 8
GND
MUXsel2
MUXsel1
OE
OE
MUXsel1
MUXsel2
—
CLK
OE
MUXsel1
MUXsel2
CLK
CLK
MUXsel2
MUXsel1
OE
CLK
—
MUXsel2
MUXsel1
OE
CLK
—
MUXsel2
MUXsel1
OE
CLK
—
MUXsel2
MUXsel1
OE
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
OE
MUXsel1
MUXsel2
—
CLK
—
I/O A 12
VCC
OE
I/O A 13
I/O A 14
I/O A 15
I/O A 16
I/O A 17
I/O A 18
I/O A 19
GND
I/O A 20
I/O A 21
I/O A 22
I/O A 23
I/O A 24
I/O A 25
I/O A 26
VCC
MUXsel1
MUXsel2
CLK
ispGDX120A
OE
Top View
MUXsel1
MUXsel2
—
CLK
OE
MUXsel1
MUXsel2
CLK
OE
MUXsel1
—
CLK
MUXsel2
MUXsel1
OE
CLK
—
MUXsel2
—
MUXsel1
OE
I/O C 7
VCC
I/O C 6
I/O C 5
I/O C 4
I/O C 3
I/O C 2
I/O C 1
I/O C 0
GND
MUXsel2
—
CLK
I/O A 27
GND
I/O A 28
I/O A 29
I/O B 0
I/O B1
CLK
MUXsel2
MUXsel1
OE
CLK
—
OE
MUXsel1
MUXsel2
CLK
82
81
I/O B 2
1. NC pins are not to be connected to any active signals, VCC or GND.
22