欢迎访问ic37.com |
会员登录 免费注册
发布采购

GAL22LV10 参数 Datasheet PDF下载

GAL22LV10图片预览
型号: GAL22LV10
PDF下载: 下载PDF文件 查看货源
内容描述: 低压E2CMOS PLD通用阵列Logic⑩ [Low Voltage E2CMOS PLD Generic Array Logic⑩]
分类和应用:
文件页数/大小: 18 页 / 218 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
 浏览型号GAL22LV10的Datasheet PDF文件第8页浏览型号GAL22LV10的Datasheet PDF文件第9页浏览型号GAL22LV10的Datasheet PDF文件第10页浏览型号GAL22LV10的Datasheet PDF文件第11页浏览型号GAL22LV10的Datasheet PDF文件第13页浏览型号GAL22LV10的Datasheet PDF文件第14页浏览型号GAL22LV10的Datasheet PDF文件第15页浏览型号GAL22LV10的Datasheet PDF文件第16页  
Specifications GAL22LV10  
GAL22LV10D: SWITCHING TEST CONDITIONS  
Input Pulse Levels  
GND to 3.0V  
1.5ns 10% – 90%  
1.5V  
Input Rise and Fall Times  
Input Timing Reference Levels  
Output Timing Reference Levels  
Output Load  
+1.45V  
1.5V  
See Figure  
TEST POINT  
R
1
Output Load Conditions (see figure)  
FROM OUTPUT (O/Q)  
UNDER TEST  
Z0 = 50, CL = 35pF*  
Test Condition  
R1  
CL  
A
B
50Ω  
50Ω  
50Ω  
50Ω  
50Ω  
35pF  
35pF  
35pF  
35pF  
35pF  
*CL includes test fixture and probe capacitance.  
High Z to Active High at 1.9V  
High Z to Active Low at 1.0V  
Active High to High Z at 1.9V  
Active Low to High Z at 1.0V  
C
GAL22LV10C: SWITCHING TEST CONDITIONS  
+3.3V  
Input Pulse Levels  
GND to 3.0V  
2.0ns 10% – 90%  
1.5V  
Input Rise and Fall Times  
Input Timing Reference Levels  
Output Timing Reference Levels  
Output Load  
R
1
1.5V  
See Figure  
FROM OUTPUT (O/Q)  
UNDER TEST  
TEST POINT  
3-state levels are measured 0.5V from steady-state active  
level.  
C L*  
Output Load Conditions (see figure)  
R
2
Test Condition  
R1  
R2  
CL  
A
B
316Ω  
316Ω  
316Ω  
316Ω  
316Ω  
348Ω  
348Ω  
348Ω  
348Ω  
348Ω  
35pF  
35pF  
35pF  
5pF  
Active High  
Active Low  
Active High  
Active Low  
*C L INCLUDES TEST FIXTURE AND PROBE CAPACITANCE  
C
5pF  
12