Lattice Semiconductor
Figure 2-1. Simplified Block Diagram, ECP2-6 Device (Top Level)
Programmable
Function Units
(PFUs)
Architecture
LatticeECP2/M Family Data Sheet
Flexible sysIO Buffers:
LVCMOS, HSTL, SSTL,
LVDS, and other standards
sysDSP Blocks
Multiply and
Accumulate Support
Pre-engineered source
synchronous support
• DDR1/2
• SPI4.2
• ADC/DAC devices
sysMEM Block RAM
18kbit Dual Port
Flexible routing optimized
for speed, cost and routability
sysCLOCK PLLs and DLLs
Frequency Synthesis and
Clock Alignment
Configuration logic, including
dual boot and encryption.
On-chip oscillator and
soft-error detection.
Configuration port
Figure 2-2. Simplified Block Diagram, ECP2M20 Device (Top Level)
SERDES
Flexible sysIO
Buffers:
LVCMOS, HSTL
SSTL, LVDS
Programmable
Function Units
(PFUs)
Pre-Engineered
Source Synchronous
Support
• DDR1/2
• SPI4.2
• ADC/DAC devices
Channel
3
Channel
2
Channel
1
Channel
0
DSP Blocks
Multiply & Accumulate
Support
sysCLOCK SPLLs
Configuration
Logic, Including
dual
boot
and encryption,
and soft-error detection
sysMEM Block
RAM 18kbit Dual Port
Flexible Routing
optimized for speed,
cost & routability
sysCLOCK GPLLs
& GDLLs
Frequency Synthesis
& Clock Alignment
Configuration Port
On-Chip
Oscillator
2-2
LATTICE [ LATTICE SEMICONDUCTOR ]
