DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
sysI/O Differential Electrical Characteristics
LVDS
Over Recommended Operating Conditions
Parameter
Description
Input Voltage
Test Conditions
Min.
0
Typ.
—
Max.
2.4
Units
V
V
V
V
, V
INP INM
Input Common Mode Voltage
Differential Input Threshold
Input Current
Half the Sum of the Two Inputs
Difference Between the Two Inputs
Power On or Power Off
0.05
+/-100
—
—
2.35
—
V
CM
—
mV
µA
V
THD
I
—
+/-10
1.60
—
IN
V
V
V
Output High Voltage for V or V
R = 100 Ohm
—
1.38
1.03
350
OH
OL
OD
OP
OM
T
Output Low Voltage for V or V
R = 100 Ohm
0.9V
250
V
OP
OM
T
Output Voltage Differential
(V - V ), R = 100 Ohm
450
mV
OP
OM
T
Change in V Between High and
Low
OD
ΔV
—
—
50
mV
OD
V
Output Voltage Offset
(V + V )/2, R = 100 Ohm
1.125
—
1.20
—
1.375
50
V
OS
OP
OM
T
ΔV
Change in V Between H and L
mV
OS
OS
V
= 0V Driver Outputs Shorted to
OD
I
Output Short Circuit Current
Output Short Circuit Current
—
—
—
—
24
12
mA
mA
SA
Ground
V
= 0V Driver Outputs Shorted to
OD
I
SAB
Each Other
Differential HSTL and SSTL
Differential HSTL and SSTL outputs are implemented as a pair of complementary single-ended outputs. All allow-
able single-ended output classes (class I and class II) are supported in this mode.
For further information about LVPECL, RSDS, MLVDS, BLVDS and other differential interfaces please see the list
of additional technical information at the end of this data sheet.
3-11
LATTICE [ LATTICE SEMICONDUCTOR ]
