Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-6E/SE and LFE2-12E/SE Logic Signal Connections: 144 TQFP (Cont.)
LFE2-6E/SE
LFE2-12E/12SE
Pin
Pin/Pad
Pin/Pad
Dual
Number
Function
Bank
3
3
3
-
Dual Function
Differential
Function
Bank
Function
Differential
91
PR20B
PR20A
RLM0_PLLCAP
VCC
RLM0_GPLLC_IN_A** C (LVDS)*
PR20B
PR20A
RLM0_PLLCAP
VCC
3
3
3
-
RLM0_GPLLC_IN_A** C (LVDS)*
RLM0_GPLLT_IN_A** T (LVDS)*
92
RLM0_GPLLT_IN_A**
T (LVDS)*
93
94
95
GND
-
GND
-
96
PR17B
PR17A
PR16B
PR16A
PR15B
PR15A
VCC
3
3
3
3
3
3
-
RLM0_GDLLC_IN_A** C (LVDS)*
PR17B
PR17A
PR16B
PR16A
PR15B
PR15A
VCC
3
3
3
3
3
3
-
RLM0_GDLLC_IN_A** C (LVDS)*
97
RLM0_GDLLT_IN_A**
VREF2_3
T (LVDS)*
C
RLM0_GDLLT_IN_A**
VREF2_3
T (LVDS)*
C
98
99
VREF1_3
T
VREF1_3
T
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
PCLKC3_0
C (LVDS)*
T (LVDS)*
PCLKC3_0
C (LVDS)*
T (LVDS)*
PCLKT3_0
PCLKT3_0
PR13B
PR13A
GND
2
2
-
PCLKC2_0/RDQ10
PCLKT2_0/RDQ10
C
T
PR13B
PR13A
GND
2
2
-
PCLKC2_0/RDQ10
PCLKT2_0/RDQ10
C
T
VCCIO2
PR2B
2
2
2
1
1
1
1
1
1
1
1
1
1
1
-
VCCIO2
PR2B
2
2
2
1
1
1
1
1
1
1
1
1
1
1
-
VREF2_2
VREF1_2
VREF2_1
VREF1_1
C (LVDS)*
VREF2_2
VREF1_2
VREF2_1
VREF1_1
C (LVDS)*
PR2A
T (LVDS)*
PR2A
T (LVDS)*
PT28B
PT28A
PT26B
PT26A
PT24B
PT24A
PT22B
PT22A
VCCIO1
PT20B
PT20A
GND
C
T
C
T
C
T
C
T
PT55B
PT55A
PT54B
PT54A
PT52B
PT52A
PT50B
PT50A
VCCIO1
PT48B
PT48A
GND
C
T
C
T
C
T
C
T
C
T
C
T
PT18B
PT18A
PT16A
NC
1
1
1
1
1
1
1
-
C
T
PT44B
PT44A
PT40B
PT40A
PT34B
PT34A
NC
1
1
1
1
1
1
1
-
C
T
C
T
C
T
PT14B
PT14A
NC
C
T
VCC
VCC
PT12B
PT12A
PT10B
XRES
GND
1
1
0
0
-
PCLKC1_0
PCLKT1_0
PCLKC0_0
C
T
PT30B
PT30A
PT28B
XRES
1
1
0
0
-
PCLKC1_0
PCLKT1_0
PCLKC0_0
C
T
C
C
GND
PT10A
VCC
0
-
PCLKT0_0
T
PT28A
VCC
0
-
PCLKT0_0
T
4-24
LATTICE [ LATTICE SEMICONDUCTOR ]
