Specifications ispLSI 5256V
Power Consumption
PowerConsumptionintheispLSI5256Vdevicedepends complete group of four. The fast "high-speed" setting
on two primary factors: the speed at which the device is operates product terms at their normal full power con-
operating and the number of product terms used. The sumption. For portions of the logic that can tolerate
product terms have a fuse-selectable speed/power longer propagation delays, selecting the slower "low-
tradeoff setting. Each group of four product terms has a power" setting will significantly reduce the power
single speed/power tradeoff control fuse that acts on the dissipation for these product terms.Figure 10 shows the
relationship between power and operating speed.
Figure 10. Typical Device Power Consumption vs fmax
400
350
300
250
200
150
100
ispLSI 5256V
High Speed Mode
ispLSI 5256V
Low Power Mode
0
20
40
60
80
100
120
140
fmax (MHz)
Notes: Configuration of 16 16-bit Counters
Typical Current at 3.3V, 25° C
I
can be estimated for the ispLSI 5256V using the following equation:
CC
High Speed Mode: ICC = 30 + (# of PTs * 0.456) + (# of nets * Max. freq * 0.0039)
Low Power Mode: ICC = 30 + (# of PTs * 0.22) + (# of nets * Max. freq * 0.0039)
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max. freq = Highest Clock Frequency to the device
The I
estimate is based on typical conditions (V
= 3.3V, room temperature) and an assumption of 2 GLB loads
CC
CC
on average exists. These values are for estimates only. Since the value of I
and the program in the device, the actual I
is sensitive to operating conditions
CC
should be verified.
CC
0127/5256
16
LATTICE [ LATTICE SEMICONDUCTOR ]
