10 | Keysight | U4164A Logic Analyzer Module - Data Sheet
Deep Trace Captures
Using memory depth options, transitional timing and state mode store
qualification triggers
Available memory depth of up to 400 M samples allows you to debug very complex problems
where the cause and symptoms may be separated by several seconds. The amount of memory
can be upgraded after purchase; see “Upgrades” in “Ordering Information” section of this
document.
No need to sacrifice sampling resolution to view more system activity. In timing mode, if your
system has bursts of activity followed by times with little activity, you can use transitional
timing along with the logic analyzer’s deep memory to capture seconds to minutes of activity
at 400 ps (2.5 GHz), 200 ps (5 GHz), or 100 ps (10 GHz) sampling resolutions. You also have the
flexibility to increase the amount of time captured by excluding certain buses or signals from
the transition detector, for example clock or strobe signals, that add little useful information to
a state mode measurement.
In state mode, use store qualification to save only states of interest into memory. Figure 4
shows a store qualification trigger for state mode that stores only valid mode register settings
for DDR memories, allowing deep capture of only the MRS commands. The MRS command is a
“favorite” trigger that can be “recalled” from any Keysight default probing configuration for DDR
memory. Other “favorite” store qualification triggers include “Filter NOP, trigger on first valid
command,” which is where the valid commands and enough samples to capture the DQ bursts
for DDR memory transactions are stored and “Deselected” or “NOP” states are not stored,
conserving logic analyzer memory depth.
Figure 4. Mode register trigger allows you to capture key events during initialization without wasting
valuable memory.
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