IS61LV256
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
-12 ns
Min. Max.
12
—
2
—
—
0
—
3
—
0
—
—
12
—
12
6
—
7
—
5
—
13
-15 ns
Min. Max.
15
—
2
—
—
0
—
3
—
0
—
—
15
—
15
7
—
8
—
6
—
15
-20 ns
Min. Max.
20
—
2
—
—
0
—
3
—
0
—
—
20
—
20
8
—
9
—
9
—
18
-25 ns
Min. Max.
25
—
2
—
—
0
—
3
—
0
—
—
25
—
25
9
—
10
—
10
—
20
ISSI
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
(2)
t
HZOE
(2)
t
LZCE
(2)
t
HZCE
(2)
t
PU
(3)
t
PD
(3)
CE
Access Time
OE
Access Time
OE
to Low-Z Output
OE
to High-Z Output
CE
to Low-Z Output
CE
to High-Z Output
CE
to Power-Up
CE
to Power-Down
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured
±500
mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1a and 1b
AC TEST LOADS
635
Ω
3.3V
635
Ω
3.3V
OUTPUT
30 pF
Including
jig and
scope
702
Ω
OUTPUT
5 pF
Including
jig and
scope
702
Ω
Figure 1a.
Figure 1b.
2-4
Integrated Silicon Solution, Inc.
Rev. F 0296
SR81995LV61
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
