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IC42S16800D-7TL 参数 Datasheet PDF下载

IC42S16800D-7TL图片预览
型号: IC42S16800D-7TL
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆×8 , 8Meg X16 128兆位同步DRAM [16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM]
分类和应用: 存储内存集成电路光电二极管动态存储器时钟
文件页数/大小: 62 页 / 530 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS42S81600D, IS42S16800D  
GENERAL DESCRIPTION  
READ  
The READ command selects the bank from BA0, BA1  
inputs and starts a burst read access to an active row.  
InputsA0-A9(x8);A0-A8(x16)providesthestartingcolumn  
location. WhenA10isHIGH,thiscommandfunctionsasan  
AUTOPRECHARGEcommand. Whentheautoprecharge  
is selected, the row being accessed will be precharged at  
the end of the READ burst. The row will remain open for  
subsequent accesses when AUTO PRECHARGE is not  
selected. DQ’sreaddataissubjectto thelogiclevel onthe  
DQM inputs two clocks earlier. When a given DQM signal  
wasregisteredHIGH,thecorrespondingDQ’swillbeHigh-  
Z two clocks later. DQ’s will provide valid data when the  
DQM signal was registered LOW.  
PRECHARGEfunctioninconjunctionwithaspecificREAD  
orWRITEcommand. ForeachindividualREADorWRITE  
command, auto precharge is either enabled or disabled.  
AUTO PRECHARGE does not apply except in full-page  
burstmode.UponcompletionoftheREADorWRITEburst,  
a precharge of the bank/row that is addressed is automati-  
callyperformed.  
AUTO REFRESH COMMAND  
This command executes the AUTO REFRESH operation.  
The row address and bank to be refreshed are automatically  
generatedduringthisoperation. Thestipulatedperiod(tRC)is  
required for a single refresh operation, and no other com-  
mandscanbeexecutedduringthisperiod. Thiscommandis  
executed at least 4096 times for every 64ms. During an  
AUTOREFRESHcommand,addressbitsareDon’tCare”.  
This command corresponds to CBR Auto-refresh.  
WRITE  
A burst write access to an active row is initiated with the  
WRITE command. BA0, BA1 inputs selects the bank, and  
the starting column location is provided by inputs A0-A9  
(x8); A0-A8 (x16). Whether or not AUTO-PRECHARGE is  
used is determined by A10.  
BURST TERMINATE  
TheBURSTTERMINATEcommandforciblyterminatesthe  
burst read and write operations by truncating either fixed-  
length or full-page bursts and the most recently registered  
READ or WRITE command prior to the BURST TERMI-  
NATE.  
Therowbeingaccessedwillbeprechargedattheendofthe  
WRITE burst, if AUTO PRECHARGE is selected. If AUTO  
PRECHARGE is not selected, the row will remain open for  
subsequent accesses.  
Amemoryarrayiswrittenwithcorrespondinginputdataon  
DQ’sandDQMinputlogiclevelappearingatthesametime.  
Data will be written to memory when DQM signal is LOW.  
When DQM is HIGH, the corresponding data inputs will be  
ignored, and a WRITE will not be executed to that byte/  
column location.  
COMMAND INHIBIT  
COMMAND INHIBIT prevents new commands from being  
executed. Operations in progress are not affected, apart  
from whether the CLK signal is enabled  
NO OPERATION  
When CS is low, the NOP command prevents unwanted  
commandsfrombeingregisteredduringidleorwaitstates.  
PRECHARGE  
ThePRECHARGEcommandisusedtodeactivatetheopen  
row in a particular bank or the open row in all banks. BA0,  
BA1canbeusedtoselectwhichbankisprechargedorthey  
aretreatedasDon’tCare”. A10determinedwhetheroneor  
all banks are precharged. After executing this command,  
thenextcommandfortheselectedbank(s)isexecutedafter  
passage of the period tRP, which is the period required for  
bankprecharging. Onceabankhasbeenprecharged,itis  
intheidlestateandmustbeactivatedpriortoanyREADor  
WRITE commands being issued to that bank.  
LOAD MODE REGISTER  
During the LOAD MODE REGISTER command the mode  
registerisloadedfromA0-A11. Thiscommandcanonlybe  
issued when all banks are idle.  
ACTIVE COMMAND  
When the ACTIVE COMMAND is activated, BA0, BA1  
inputs selects a bank to be accessed, and the address  
inputs on A0-A11 selects the row. Until a PRECHARGE  
command is issued to the bank, the row remains open for  
accesses.  
AUTO PRECHARGE  
TheAUTOPRECHARGEfunctionensuresthattheprecharge  
is initiated at the earliest valid stage within a burst. This  
functionallowsforindividual-bankprechargewithoutrequir-  
ing an explicit command. A10 to enable the AUTO  
Integrated Silicon Solution, Inc. — www.issi.com  
7
Rev. E  
07/28/08  
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