IC41SV4105
AC CHARACTERISTICS (Continued)(1,2,3,4,5,6)
(Recommended Operating Conditions unless otherwise noted.)
-50
-70
-100
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Units
tACH
Column-Address Setup Time to CAS
15
10
−
−
15
20
−
−
15
25
−
−
ns
ns
Precharge during WRITE Cycle
tOEH
OE Hold Time from WE during
READ-MODIFY-WRITE cycle(18)
tDS
Data-In Setup Time(15, 22)
Data-In Hold Time(15, 22)
0
8
−
−
−
−
0
−
−
−
−
0
−
−
−
−
ns
ns
ns
ns
tDH
15
20
tRWC
tRWD
READ-MODIFY-WRITE Cycle Time
125
70
185
100
240
130
RAS to WE Delay Time during
READ-MODIFY-WRITE Cycle(14)
tCWD
tAWD
tPC
CAS to WE Delay Time(14, 20)
34
42
20
−
−
−
45
60
45
−
−
−
55
85
60
−
−
−
ns
ns
ns
Column-Address to WE Delay Time(14)
Fast Page Mode READ or WRITE
Cycle Time
tRASP
tCPA
Fast Page Mode RAS Pulse Width
Access Time from CAS Precharge(15)
Fast Page Mode READ WRITE
50
-
100K
27
70
-
100K 100
100K
55
ns
ns
ns
40
-
tPRWC
47
−
100
−
120
−
Cycle Time
tOFF
Output Buffer Turn-Off Delay from
3
15
3
15
3
15
ns
(13,15,19, 24)
CAS or RAS
tCSR
tCHR
tORD
CAS Setup Time (CBR REFRESH)(20, 25)
5
10
0
−
−
−
5
10
0
−
−
−
5
10
0
−
−
−
ns
ns
ns
CAS Hold Time (CBR REFRESH)( 21, 25)
OE Setup Time prior to RAS during
HIDDEN REFRESH Cycle
tREF
tT
Auto Refresh Period 1,024 Cycles
Transition Time (Rise or Fall)(2, 3)
−
3
16
50
−
3
16
50
−
3
16
50
ms
ns
AC TEST CONDITIONS
Output load:
One TTL Load and 100 pF
Input timing reference levels:
VIH = 1.4V, VIL = 0.6V
Output timing reference levels: VOH = 1.4V, VOL = 0.6V
8
Integrated Circuit Solution Inc.
DR032-0A 10/29/2001
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
