IC41C4400x and IC41LV4400x Series
FUNCTIONAL BLOCK DIAGRAM
OE
WE
WE
CONTROL
LOGICS
OE
CONTROL
LOGIC
CAS
CONTROL
LOGIC
CAS
RAS
CAS
WE
DATA I/O BUS
RAS
CLOCK
GENERATOR
COLUMN DECODERS
SENSE AMPLIFIERS
REFRESH
COUNTER
I/O0-I/O3
MEMORY ARRAY
4,194,304 x 4
ADDRESS
BUFFERS
A0-A10(A11)
TRUTH TABLE
Function
RAS
CAS
WE
X
OE
X
Address tR/tC I/O
Standby
H
L
L
L
H
L
L
L
X
High-Z
Read
H
L
ROW/COL
ROW/COL
ROW/COL
DOUT
DIN
Write: Word (Early Write)
Read-Write
L
X
H→L
L→H
DOUT, DIN
EDO Page-Mode Read 1st Cycle:
2nd Cycle:
L
L
H→L
H→L
H
H
L
L
ROW/COL
NA/COL
DOUT
DOUT
EDO Page-Mode Write 1st Cycle:
2nd Cycle:
L
L
H→L
H→L
L
L
X
X
ROW/COL
NA/COL
DIN
DIN
EDO Page-Mode
Read-Write
1st Cycle:
2nd Cycle:
L
L
H→L
H→L
H→L
H→L
L→H
L→H
ROW/COL
NA/COL
DOUT, DIN
DOUT, DIN
Hidden Refresh
Read
L→H→L
L→H→L
L
L
H
L
L
X
ROW/COL
ROW/COL
DOUT
DOUT
Write(1)
RAS-Only Refresh
CBR Refresh
L
H
L
X
X
X
X
ROW/NA
X
High-Z
High-Z
H→L
Note:
1. EARLY WRITE only.
Integrated Circuit Solution Inc.
DR007-0B 10/17/2002
3