IC41C4405x and IC41LV4405x Series
AC CHARACTERISTICS (Continued)(1,2,3,4,5,6)
(Recommended Operating Conditions unless otherwise noted.)
-50
-60
Symbol
Parameter
Min. Max.
Min. Max.
Units
tACH
Column-Address Setup Time to CAS
Precharge during WRITE Cycle
15
−
15
−
ns
tOEH
OE Hold Time from WE during
8
−
10
−
ns
READ-MODIFY-WRITE cycle(18)
tDS
Data-In Setup Time(15, 22)
Data-In Hold Time(15, 22)
0
8
−
−
−
−
0
−
−
−
−
ns
ns
ns
ns
tDH
10
tRWC
tRWD
READ-MODIFY-WRITE Cycle Time
108
64
133
77
RAS to WE Delay Time during
READ-MODIFY-WRITE Cycle(14)
tCWD
tAWD
tPC
CAS to WE Delay Time(14, 20)
26
39
20
−
−
−
32
47
25
−
−
−
ns
ns
ns
Column-Address to WE Delay Time(14)
Fast Page Mode READ or WRITE
Cycle Time
tRASP
tCPA
RAS Pulse Width
50
−
56
100K
30
−
−
12
60
−
68
100K
35
−
−
15
ns
ns
ns
ns
ns
Access Time from CAS Precharge(15)
READ-WRITE Cycle Time
tPRWC
tCOH
tOFF
Data Output Hold after CAS LOW
Output Buffer Turn-Off Delay from
5
5
0
0
(13,15,19, 24)
CAS or RAS
tWHZ
tCSR
tCHR
tORD
Output Disable Delay from WE
3
5
8
0
10
−
−
3
5
10
−
−
ns
ns
ns
ns
CAS Setup Time (CBR REFRESH)(20, 25)
CAS Hold Time (CBR REFRESH)( 21, 25)
OE Setup Time prior to RAS during
HIDDEN REFRESH Cycle
10
0
−
−
tREF
tT
Auto Refresh Period
2,048 Cycles
4,096 Cycles
−
−
1
32
64
−
−
1
32
64
ms
ns
Transition Time (Rise or Fall)(2, 3)
50
50
AC TEST CONDITIONS
Output load:
Two TTL Loads and 50 pF (Vcc = 5.0V + 10%)
One TTL Load and 50 pF (Vcc = 3.3V + 10%)
Input timing reference levels:
VIH = 2.4V, VIL = 0.8V (Vcc = 5.0V + 10%)
VIH = 2.4V, VIL = 0.8V (Vcc = 3.3V + 10%)
Output timing reference levels: VOH = 2.0V, VOL = 0.8V (Vcc = 5.0V + 10%, 3.3V + 10%)
8
Integrated Circuit Solution Inc.
DR013-0B 10/17/2002