AS7C33512PFS16A
AS7C33512PFS18A
®
TQFP thermal resistance
Description
Conditions
Symbol
Ty pi c a l
40
Units
°C/W
°C/W
1–layer
4–layer
θ
Thermal resistance
JA
Test conditions follow standard test methods
and procedures for measuring thermal
impedance, per EIA/JESD51
(junction to ambient)1
θ
22
JA
JC
Thermal resistance
θ
8
°C/W
(junction to top of case)1
1 This parameter is sampled.
DC electrical characteristics
–166
–150
–133
–100
Parameter
Symbol
Test conditions
VDD = Max, VIN = GND to VDD
OE ≥ VIH, VDD = Max,
Min Max Min Max Min Max Min Max Unit
Input leakage
current1
|ILI|
–
–
–
2
2
–
–
–
2
2
–
–
–
2
2
–
–
–
2
2
µA
µA
Output leakage
current
|ILO
|
VOUT = GND to VDD
2
Operating power
supply current
ICC
CE0 = VIL, CE1 = VIH, CE2 = VIL,
f = fMax, IOUT = 0 mA
475
450
425
325 mA
(Pipelined)
2
ICC
Operating power
supply current
CE0 = VIL, CE1 = VIH, CE2 = VIL,
f = fMax, IOUT = 0 mA
–
325
–
325
–
300
–
300 mA
90
(Flow-
Through)
ISB
Deselected, f = fMax, ZZ ≤ VIL
–
–
130
30
–
–
110
30
–
–
100
30
–
–
Deselected, f = 0, ZZ ≤ 0.2V
all VIN ≤ 0.2V or ≥ VDD – 0.2V
Standby power
supply current
ISB1
30
mA
Deselected, f = f , ZZ
≥
V
– 0.2V
Max
DD
ISB2
–
30
–
30
–
30
–
30
All VIN ≤ VIL or ≥ VIH
VOL
IOL = 8 mA, VDDQ = 3.465V
IOH = –4 mA, VDDQ = 3.135V
–
0.4
–
–
0.4
–
–
0.4
–
–
0.4
V
Output voltage
VOH
2.4
2.4
2.4
2.4
–
1 LBO pin has an internal pull-up and input leakage = 10 µA.
2 I given with no output loading. I increases with faster cycle times and greater output loading.
CC CC
DC electrical characteristics for 2.5V I/O operation
–166
–150
–133
–100
Parameter
Symbol
|ILO
Test conditions
Min Max Min Max Min Max Min Max Unit
Output leakage
current
OE ≥ VIH, VDD = Max,
OUT = GND to VDD
|
–1
1
–1
1
–1
1
–1
1
µA
V
V
VOL
IOL = 2 mA, VDDQ = 2.65V
IOH = –2 mA, VDDQ = 2.35V
–
0.7
–
–
0.7
–
–
0.7
–
–
0.7
–
Output voltage
VOH
1.7
1.7
1.7
1.7
4/15/02; v.1.5
Alliance Semiconductor
7 of 14
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
